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Journal of Real-Time Image Processing

, Volume 12, Issue 4, pp 633–634 | Cite as

Special issue on architectures of smart cameras for real-time applications

  • Ricardo Carmona-Galán
  • François Berry
  • Richard Kleihorst
  • Dominique Ginhac
Guest Editorial

Smart cameras are embedded vision systems whose primary function is to produce a semantic understanding of the scene and generate a response in the form of application-specific signals and data. They are autonomous vision systems themselves and can be the building blocks of a more complex smart camera network. They are built around high-performance on-chip and on-board computing and communication infrastructure, combining image sensing, real-time image and video processing, and communications into a single embedded device. They can also be interconnected in networks and cooperate to provide access to many views, enabling more challenging applications in fields like visual control, surveillance or tracking.

The design of such embedded vision systems requires a multidisciplinary approach, needing not only advanced electronic design but also software engineering. There are design challenges on board weight, chip area, cost and power consumption, and limited resources in terms of computing and memory. Different approaches have been shown at the Workshop on Architecture of Smart Cameras (WASC), a workshop especially dedicated to bring together researchers and engineers covering the multidisciplinary world of smart cameras that has been organized in Clermont-Ferrand (2012), Seville (2013), Pisa (2014), and Santiago de Compostela (2015).

This special issue focuses on those topics having an incidence on the smart camera architecture, either emerging from the design of smart sensing and processing devices or imposed by the specifications for a particular distributed camera network and its applications. The collection of papers presented here starts by emphasizing the influence of the architecture in the performance of smart camera systems. The first paper represents a specific approach to the implementation of real-time image processing applications on a smart camera architecture based on FPGA. For this, J. Sérot and his colleagues at Institute Pascal (Clermont-Ferrand, France) have developed a programming language, CAPH, based on the dataflow model of computation, oriented towards efficiency in the implementation.

After that, a couple of examples of HW/SW co-design of embedded vision systems are presented. First, J. Miteran and colleagues from Le2i-CNRS (Dijon, France) propose a methodology that enables fast prototyping for fast architecture exploration and optimization. Then, F. Pelissier and colleagues at Institute Pascal (Clermont-Ferrand, France) describe a prototype system for SLAM based on multiple processors on a single programmable chip. In both cases, delving into the characteristics of the application provides clues to optimize the architecture.

On a more generic scope, E. Calvo and colleagues from IMSE-CNM (Seville, Spain) review a wide set of low-cost modules for the specific task of background subtraction.

There is also room for interesting multi-camera systems. V. Popovic and colleagues from EPFL (Lausanne, Switzerland) propose a multi-camera system able to provide high dynamic range images. On the other side, A. Zarandy and colleagues from MTA-SZTAKI (Budapest, Hungary) present a multiple-camera system for unmanned aerial vehicle (UAV) navigation and collision avoidance. In both cases, multiple cameras are employed to extend ranges. In the first place, multiple exposures provide the capture of an extended illumination range. In the second, using multiple cameras is mandatory to cover a wide field of view with the necessary resolution. Also in the use of multiple cameras, there is a paper dedicated to stereo vision in embedded systems, written by S. Madeo and his colleagues from Scuola Superiore Sant’Anna (Pisa, Italy). They propose a design methodology for an optimized implementation.

Another couple of papers describe complete imaging systems based on smart cameras. First, P. J. Lapray and colleagues from Le2i-CNRS (Dijon, France) propose an architecture providing full sensor size HDR at 60fps, based on hardware accelerators in FPGA. After that, J. Müller and colleagues from Technical University Dresden (Germany), describe a general-purpose video processing system based on cellular neural networks, also emulated in FPGA, providing 1700fps @ VGA resolution.

Another important aspect in smart camera systems is video encoding. This issue includes two papers on this special issue. First, J. Hanca and colleagues from the Vrije Universiteit (Brussels, Belgium) present a lightweight encoding technique that is sufficiently error resilient. Second, N. Bahri and colleagues from the LETI (Sfax, Tunisia) introduce an approach to improve encoding speed and frame level parallelism in the available DSPs.

Finally, smart cameras are the central element of smart camera networks; therefore, there are also interesting issues to be considered for a good performance. C. Bobda and his group at the University of Arkansas (USA) propose a clustering approach for bandwidth reduction in distributed smart camera networks. Also with the camera network performance in mind, L. Ye and colleagues from Southeast University (Nanjing, China) propose a simplification of the Ethernet controller and a modification of the protocols for optimizing the use of GigaE cameras.

In summary, the objective of this special issue is to cover the different aspects related with the development of smart camera systems and networks. A universal solution is still far from being available, but this special issue presents a collection of approaches that pursue efficiency and performance at different levels: at the sensor plane, at early stages of visual signal processing, higher in the image processing chain, at software level or at the network level. The Guest Editors hope that these proposals may help the community to continue progressing towards flexible enough but still efficient solutions for smart cameras in real-time applications.

Copyright information

© Springer-Verlag Berlin Heidelberg 2016

Authors and Affiliations

  • Ricardo Carmona-Galán
    • 1
  • François Berry
    • 2
  • Richard Kleihorst
    • 3
  • Dominique Ginhac
    • 4
  1. 1.Instituto de Microelectrónica de Sevilla-CNM (CSIC-Universidad de Sevilla)SevilleSpain
  2. 2.Institute Pascal-CNRSUniversité Blaise Pascal, Clermont-FerrandAubiereFrance
  3. 3.Naluri Belgium & Universiteit GentKasterleeBelgium
  4. 4.Le2i-CNRSUniversité de BourgogneDijonFrance

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