A real-time motion estimation FPGA architecture

  • Konstantinos Babionitakis
  • Gregory A. Doumenis
  • George Georgakarakos
  • George Lentaris
  • Kostantinos Nakos
  • Dionysios Reisis
  • Ioannis Sifnaios
  • Nikolaos Vlassopoulos
Special Issue

Abstract

A motion estimation architecture allowing the execution of a variety of block-matching search techniques is presented in this paper. The ability to choose the most efficient search technique with respect to speeding up the process and locating the best matching target block leads to the improvement of the quality of service and the performance of the video encoding. The proposed architecture is pipelined to efficiently support a large set of currently used block-matching algorithms including Diamond Search, 3-step, MVFAST and PMVFAST. The proposed design executes the algorithms by providing a set of instructions common for all the block-matching algorithms and a few instructions accommodating the specific actions of each technique. Moreover, the architecture supports the use of different search techniques at the block level. The results and performance measurements of the architecture have been validated on FPGA supporting maximum throughput of 30 frames/s with frame size 1,024 × 768.

Keywords

FPGA Video encoding Motion estimation Real time Block-matching 

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Copyright information

© Springer-Verlag 2007

Authors and Affiliations

  • Konstantinos Babionitakis
    • 1
  • Gregory A. Doumenis
    • 2
  • George Georgakarakos
    • 2
  • George Lentaris
    • 1
  • Kostantinos Nakos
    • 1
  • Dionysios Reisis
    • 1
  • Ioannis Sifnaios
    • 2
  • Nikolaos Vlassopoulos
    • 1
  1. 1.Electronics Laboratory, Department of PhysicsNational and Kapodistrian University of AthensAthensGreece
  2. 2.Global Digital Technologies S.A.AthensGreece

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