Journal of Real-Time Image Processing

, Volume 1, Issue 4, pp 267–283

Algorithmic and architectural design for real-time and power-efficient Retinex image/video processing

  • Sergio Saponara
  • Luca Fanucci
  • Stefano Marsi
  • Giovanni Ramponi
Original Research Paper

DOI: 10.1007/s11554-007-0027-z

Cite this article as:
Saponara, S., Fanucci, L., Marsi, S. et al. J Real-Time Image Proc (2007) 1: 267. doi:10.1007/s11554-007-0027-z

Abstract

This paper presents novel algorithmic and architectural solutions for real-time and power-efficient enhancement of images and video sequences. A programmable class of Retinex-like filters, based on the separation of the illumination and reflectance components, is proposed. The dynamic range of the input image is controlled by applying a suitable non-linear function to the illumination, while the details are enhanced by processing the reflectance. An innovative spatially recursive rational filter is used to estimate the illumination. Moreover, to improve the visual quality results of two-branch Retinex operators when applied to videos, a novel three-branch technique is proposed which exploits both spatial and temporal filtering. Real-time implementation is obtained by designing an Application Specific Instruction-set Processor (ASIP). Optimizations are addressed at algorithmic and architectural levels. The former involves arithmetic accuracy definition and linearization of non-linear operators; the latter includes customized instruction set, dedicated memory structure, adapted pipeline, bypasses, custom address generator, and special looping structures. The ASIP is synthesized in standard-cells CMOS technology and its performances are compared to known Digital signal processor (DSP) implementations of real-time Retinex filters. As a result of the comparison, the proposed algorithmic/architectural design outperforms state-of-art Retinex-like operators achieving the best trade-off between power consumption, flexibility, and visual quality.

Keywords

Application specific instruction-set processors (ASIP) Digital signal processor (DSP) Retinex Image enhancement Real-time image and video filters 

Copyright information

© Springer-Verlag 2007

Authors and Affiliations

  • Sergio Saponara
    • 1
  • Luca Fanucci
    • 1
  • Stefano Marsi
    • 2
  • Giovanni Ramponi
    • 2
  1. 1.Dipartimento Ingegneria della InformazioneUniversity of PisaPisaItaly
  2. 2.Dipartimento Elettrotecnica, Elettronica, InformaticaUniversity of TriesteTriesteItaly

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