Advertisement

Science China Information Sciences

, Volume 58, Issue 4, pp 1–6 | Cite as

Self-aligned offset gate poly-Si TFTs using photoresist trimming technology

  • LongYan Wang
  • Lei Sun
  • DeDong Han
  • Yi Wang
  • ManSun Chan
  • ShengDong ZhangEmail author
Research Paper
  • 108 Downloads

Abstract

This paper reports a simple method of fabricating self-aligned offset gate (SAOG) polycrystalline silicon (poly-Si) thin film transistors (TFTs). The SAOG structure was formed by two key steps, i.e. an isotropic photoresist trimming and an additional gate fringe etching. The fabricated SAOG devices with this proposed method exhibit a significantly suppressed off-current increase with gate bias compared with the non-offset ones, and have identical bi-directional transfer characteristics under reversed source/drain biases. It is also shown that the performances of poly-Si TFTs with metal-induced lateral crystallization can be improved significantly by annealing in forming gas.

Keywords

photoresist trimming offset polycrystalline silicon (poly-Si) thin film transistors (TFTs) 
042401 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Kim C W, Jung J G, Choi J B, et al. LTPS Backplane technologies for AMLCDs and AMOLEDs. In: Dig Tech Paper SID Int Symp 2011. 862–865Google Scholar
  2. 2.
    Kimura M, Yudasaka I, Kanbe S, et al. Low-temperature polysilicon thin-film transistor driving with integrated driver for high-resolution light emitting polymer display. IEEE Trans Electr Devices, 1999, 46: 2282–2288CrossRefGoogle Scholar
  3. 3.
    Kim M, Cheon J, Lee J, et al. World-best performance LTPS TFTs with robust bending properties on AMOLED displays. In: Dig Tech Paper SID Int Symp 2011. 194–197Google Scholar
  4. 4.
    Fossum J G, Oritz-Conde A, Shichijo H, et al. Anomalous leakage current in LPCVD polysilicon MOSFET’s. IEEE Trans Electr Dev, 1985, 32: 1878–1884CrossRefGoogle Scholar
  5. 5.
    Olasupo K R, Hatalis M K. Leakage current mechanism in sub-micron polysilicon thin-film transistors. IEEE Trans Electr Dev, 1996, 43: 1218–1223CrossRefGoogle Scholar
  6. 6.
    Park H S, Shin H S, Lee W, et al. A new thin-film transistor pixel structure suppressing the leakage current effects on AMOLED. IEEE Electr Dev Lett, 2009, 30: 240–242CrossRefGoogle Scholar
  7. 7.
    Orouji A A, Kumar M J. Leakage current reduction techniques in poly-Si TFTs for active matrix liquid crystal displays: A comprehensive study. IEEE Trans Dev Mater Rel, 2006, 6: 315–325CrossRefGoogle Scholar
  8. 8.
    Liu C T, Yu C H D, Kornblit A, et al. Inverted thin-film transistors with a simple self-aligned lightly doped drain structure. IEEE Trans Electr Dev, 1992, 39: 2803–2809CrossRefGoogle Scholar
  9. 9.
    Zhao T, Cao M, Plummer J D, et al. A novel floating gate spacer polysilicon TFT. In: International Electron Devices Meeting Tech Dig 1993. 393–396Google Scholar
  10. 10.
    Levin R M, Evans-Lutterodt K. The step coverage of undoped and phosphorus-doped SiO2 glass films. J Vac Sci Tech B, 1983, 1: 54–61CrossRefGoogle Scholar
  11. 11.
    Wang H, Chan M, Jagar S, et al. Super thin-film transistor with SOI CMOS performance formed by a novel grain enhancement method. IEEE Trans Electr Dev, 2000, 47: 1580–1586CrossRefGoogle Scholar
  12. 12.
    Mathew S, Nagarajan R, Bera L K, et al. Sub-100 nm MOSFET fabrication with low temperature resist trimming process. Thin Solid Films, 2004, 462–463: 63–66CrossRefGoogle Scholar
  13. 13.
    Kobayashi K, Murai H, Sakamoto T, et al. A novel fabrication method for polycrystalline silicon thin-film transistors with a self-aligned lightly doped drain structure. Jpn J Appl Phys, 1993, 32: 469–473CrossRefGoogle Scholar
  14. 14.
    Cheng H, Lin C, Cheng L, et al. Fabrication of low-temperature poly-Si thin film transistors with self-aligned graded lightly doped drain structure. Electrochem Solid-State Lett, 2002, 5: G1–G3CrossRefGoogle Scholar
  15. 15.
    Park C, Min B, Jun J, et al. Self-aligned offset gated poly-Si TFT’s with a floating sub-gate. IEEE Electr Dev Lett, 1997, 18: 16–18CrossRefGoogle Scholar
  16. 16.
    Oh J H, Kang D H, Park W H, et al. A center-offset polycrystalline-silicon thin-film Transistor with n+ amorphoussilicon contacts. IEEE Electr Dev Lett, 2009, 30: 36–38CrossRefGoogle Scholar
  17. 17.
    Cao M, Zhao T, Saraswat K C, et al. Study on hydrogenation of polysilicon thin film transistors by ion implantation. IEEE Trans Electr Dev, 1995, 42: 1134–1140CrossRefGoogle Scholar
  18. 18.
    Bhat G, Kwok H, Wong M. Plasma hydrogenation of metal-induced laterally crystallized thin film transistors. IEEE Electr Dev Lett, 2000, 21: 73–75.CrossRefGoogle Scholar

Copyright information

© Science China Press and Springer-Verlag Berlin Heidelberg 2014

Authors and Affiliations

  • LongYan Wang
    • 1
    • 2
  • Lei Sun
    • 1
  • DeDong Han
    • 1
  • Yi Wang
    • 1
  • ManSun Chan
    • 3
  • ShengDong Zhang
    • 1
    • 4
    Email author
  1. 1.Institute of MicroelectronicsPeking UniversityBeijingChina
  2. 2.BOE Technology Co. Ltd.BeijingChina
  3. 3.Department of Electronic and Computer EngineeringHong Kong University of Science and TechnologyHong KongChina
  4. 4.School of Electronic and Computer EngineeringPeking UniversityShenzhenChina

Personalised recommendations