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System Architecture of Godson-3 Multi-Core Processors

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Abstract

Godson-3 is the latest generation of Godson microprocessor family. It takes a scalable multi-core architecture with hardware support for accelerating applications including X86 emulation and signal processing. This paper introduces the system architecture of Godson-3 from various aspects including system scalability, organization of memory hierarchy, network-on-chip, inter-chip connection and I/O subsystem.

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Authors and Affiliations

  1. Institute of Computing Technology, Chinese Academy of Sciences, Beijing, 100190, China

    Xiang Gao, Yun-Ji Chen, Huan-Dong Wang, Dan Tang & Wei-Wu Hu

  2. Graduate University of Chinese Academy of Sciences, Beijing, 100049, China

    Huan-Dong Wang & Dan Tang

Authors
  1. Xiang Gao
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  2. Yun-Ji Chen
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  3. Huan-Dong Wang
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  4. Dan Tang
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  5. Wei-Wu Hu
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Corresponding author

Correspondence to Xiang Gao.

Additional information

Supported by the National High Technology Development 863 Program of China under Grant No. 2008AA010901, the National Natural Science Foundation of China under Grant Nos. 60736012 and 60673146, and the National Basic Research 973 Program of China under Grant No.2005CB321601.

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Gao, X., Chen, YJ., Wang, HD. et al. System Architecture of Godson-3 Multi-Core Processors. J. Comput. Sci. Technol. 25, 181–191 (2010). https://doi.org/10.1007/s11390-010-9315-3

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  • DOI: https://doi.org/10.1007/s11390-010-9315-3

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