Design of a Highly Linear Gain Stage with Complementary Derivative Superposition Technique
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In this paper a linearization method called complementary common source derivative superposition (CCS DS) is presented. This structure sets both first and second Derivative of transconductance of the stage to the nearly zero values. So it has a very good performance on both 2nd and 3rd order distortion. It is a biasing scheme to cancel second order and third order distortions of the transistors simultaneously. Both NMOS and PMOS transistors of the strucure are bias in the moderade inversion region. To keep amplifying transistors in the region of interest, a CMFB circuit is used. It makes the circuit robust to the process variations. The structure utilizes the current reuse concept and subsequently the stage provides high enough gain without consuming to much power. A brief comparison of common source stages with different derivative superposition (DS) methods is also studied. Based on simulation results, the proposed CCS DS has overall better performance than other DS structures. So this highly linear gain stage could be a part of an LNA, Mixer, or any other RF or IF signal path.
KeywordsCMOS gain stage Derivative superposition Linearization Common-source Biasing scheme