Wireless Personal Communications

, Volume 75, Issue 2, pp 1295–1306 | Cite as

Parametric Analysis to Reduce Phase Noise of Frequency Synthesizers for Wireless Communication System

Article

Abstract

The aim of this paper is analysis and presenting a technique to reduce phase noise of frequency synthesizer for pure signal synthesis. To reduce phase noise of synthesizer, first, we present a mathematical and accurate model of phase noise in phase locked loop based frequency synthesizer with take into account noise of its component. Then we predict output phase noise in term of its parameters. Finally, we describe as effective technique for phase noise in frequency synthesizer. The simulation results show the performance of the frequency synthesizer for the High Speed communication system.

Keywords

PLL Phase noise Frequency synthesis 

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Copyright information

© Springer Science+Business Media New York 2013

Authors and Affiliations

  1. 1.ECEDRawal Institute of Engineering and TechnologyFaridabadIndia
  2. 2.ECEDThapar UniversityPatialaIndia

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