The statistic information of connected components are fundamental for image processing, which could be acquired through connected components labeling. This paper proposes a hardware-efficient method for extracting statistic information of connected components in a binary image to accelerate image processing in embedded application. The proposed method scans two adjacent rows with 2 × 2 template simultaneously, meanwhile, statistic information of runs are recorded. After scanning two rows, the equivalent runs are merged, and then statistic information of completed connected region is exported directly. This method scans an image only once, which could reduce off-chip memory access massively. For a determined image resolution, the requirement of on-chip memory resource is also confirmed and not affected by the number of connected components. This algorithm is modeled with Verilog, and the simulation result shows that average processing speed could be real-time for various images with different resolution. Furthermore, the memory cost is little compared to other hardware based algorithms for labeling connected components, and the proposed method is appropriated for hardware implementation.
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This work is supported by National Natural Science Foundation of China (grant number is 61231018).
This study was funded by National Natural Science Foundation of China (grant number is 61231018).
Conflict of Interest
The authors declare that they have no conflict of interest.
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Zhao, C., Duan, G. & Zheng, N. A Hardware-Efficient Method for Extracting Statistic Information of Connected Component. J Sign Process Syst 88, 55–65 (2017). https://doi.org/10.1007/s11265-016-1126-5
- Connected component
- Extracting statistic information
- Hardware implementation