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Cryptographic Algorithms on the GA144 Asynchronous Multi-Core Processor

Implementation and Side-Channel Analysis

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Pervasive computing has turned many ordinary commodity products to smart and digital computing devices. Though these devices are mostly equipped with low-cost processors offering limited computing power, they are often requested to handle user-sensitive data. This evidently calls for the integration of different security services that typically involves computationally expensive cryptography. In this context, lightweight cryptographic constructions came recently up to minimize the computational burden on such constrained devices. Unfortunately, many of those constructions were too simplistic to preserve long-lasting confidence in their security. Therefore we aim for another approach in this work and implement standardized and well-established cryptography on an alternative, lightweight platform, namely an asynchronous GA144 ultra-low-powered multi-core processor with 144 tiny cores. We demonstrate that symmetric and asymmetric cryptography such as AES and RSA can be realized on this low-end device. With energy consumption being as low as 0.63 μJ and 22.3 mJ, this platform achieves a performance of 38 μs and 462.9 ms per AES and RSA operation, respectively.This translates to an energy consumption and computation time that is significantly lower than many lightweight implementations reported so far. We finally emphasize that this low-power and asynchronous operation of cryptography does not eliminate the threat of physical attacks, in particular power attacks. We evaluate the side-channel resistance of our design and identified that less than 5,000 measurements are already sufficient to fully recover the 128-bit key of the unprotected AES implementation.

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    This characteristic could likely also be used to carry out a timing attack, however, we did not further investigate this issue for the purposes of the present article.


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This work was supported in part by grant 01ME12025 SecMobil of the German Federal Ministry of Economics and Technology and by the DFG Research Training Group GRK 1817/1.

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Correspondence to Ingo von Maurich.

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Schneider, T., von Maurich, I., Güneysu, T. et al. Cryptographic Algorithms on the GA144 Asynchronous Multi-Core Processor. J Sign Process Syst 77, 151–167 (2014). https://doi.org/10.1007/s11265-014-0872-5

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  • GA144
  • Asynchronous processor
  • Low-power
  • AES
  • RSA
  • Implementation
  • Multi-core
  • Side-channel analysis