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Journal of Signal Processing Systems

, Volume 71, Issue 2, pp 105–109 | Cite as

High Performance FPGA-oriented Mersenne Twister Uniform Random Number Generator

  • Pedro Echeverría
  • Marisa López-Vallejo
Article

Abstract

Mersenne Twister (MT) uniform random number generators are key cores for hardware acceleration of Monte Carlo simulations. In this work, two different architectures are studied: besides the classical table-based architecture, a different architecture based on a circular buffer and especially targeting FPGAs is proposed. A 30% performance improvement has been obtained when compared to the fastest previous work. The applicability of the proposed MT architectures has been proven in a high performance Gaussian RNG.

Keywords

Mersenne-Twister URNG FPGA Monte Carlo 

Notes

Acknowledgement

This work has been funded by BBVA contract P060920579 and Cicyt project TEC2009-08589.

References

  1. 1.
    Thomas, D. B., & Luk, W. (2007). High quality uniform random number generation using lut optimised state-transition matrices. Journal of VLSI Signal Proccessing, 47, 77–92.CrossRefGoogle Scholar
  2. 2.
    Thomas, D. B., & Luk, W. (2010). fpga-optimised uniform random number generator using luts and shift registers. In Intl. conf. on field programmable logic and applications (pp. 77–82).Google Scholar
  3. 3.
    Matsumoto, M., & Nishimura, T. (1998). Mersenne twister: A 623-dimensionally equidistributed uniform pseudo-random number generator. ACM Transactions on Modeling and Computer Simulation, 8(1), 3–30.CrossRefMATHGoogle Scholar
  4. 4.
    Sriram, V., & Kearney, D. (2006). An area time efficient field programmable mersenne twister uniform random generator. In Intl. conf. engineering of reconfigurable system and algorithms (pp. 244–246).Google Scholar
  5. 5.
    Chandrasekaran, S., & Amira, A. (2008). High performance FPGA implementation of the mersenne twister. In International symposium on electronic design, test & applications (pp. 482–485).Google Scholar
  6. 6.
    Xiang, T., & Benkrid, K. (2009). Mersenne twister random number generation on FPGA, CPU and GPU. In NASA/ESA conf. on adaptative hardware and systems (pp. 460–463).Google Scholar
  7. 7.
    Echeverría, P., & López-Vallejo, M. (2007). FPGA gaussian random number generator based on quintic hermite interpolation inversion. In IEEE intl. midwest symposium on circuits and systems (pp. 871–974).Google Scholar
  8. 8.
    L’Ecuyer, P. (1996). Maximally equidistributed combined Tausworthe generators. Mathematics of Computation, 65(213), 203–213.MathSciNetCrossRefMATHGoogle Scholar

Copyright information

© Springer Science+Business Media, LLC 2012

Authors and Affiliations

  1. 1.Department of Electronic EngineeringUniversidad Politécnica de Madrid, UPMMadridSpain

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