# Static analysis of multi-core TDMA resource arbitration delays

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## Abstract

In the development of hard real-time systems, knowledge of the *Worst-Case Execution Time* (WCET) is needed to guarantee the safety of a system. For single-core systems, static analyses have been developed which are able to derive guaranteed bounds on a program’s WCET. Unfortunately, these analyses cannot directly be applied to multi-core scenarios, where the different cores may interfere with each other during the access to shared resources like for example shared buses or memories. For the arbitration of such resources, *TDMA arbitration* has been shown to exhibit favorable timing predictability properties. In this article, we review and extend a methodology for analyzing access delays for TDMA-arbitrated resources. Formal proofs of the correctness of these methods are given and a thorough experimental evaluation is carried out, where the presented techniques are compared to preexisting ones on an extensive set of real-world benchmarks for different classes of analyzed systems.

## Keywords

WCET TDMA arbitration Multi-core Shared resources Worst-case analysis Static program analysis## Notes

### Acknowledgements

This work was partially funded by the European Community’s ArtistDesign Network of Excellence, by the European Community’s 7th Framework Program FP7/2007-2013 under grant agreement n^{o} 216008, by the German Research Foundation DFG under reference number FA1017/1-1 and by Faculty Research Council grant T1 251RES0914 (R-252-000-416-112) at NUS.

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