Real-Time Systems

, Volume 48, Issue 6, pp 789–825 | Cite as

Analysis and implementation of the multiprocessor bandwidth inheritance protocol

  • Dario Faggioli
  • Giuseppe Lipari
  • Tommaso Cucinotta
Article

Abstract

The Multiprocessor Bandwidth Inheritance (M-BWI) protocol is an extension of the Bandwidth Inheritance (BWI) protocol for symmetric multiprocessor systems. Similar to Priority Inheritance, M-BWI lets a task that has locked a resource execute in the resource reservations of the blocked tasks, thus reducing their blocking time. The protocol is particularly suitable for open systems where different kinds of tasks dynamically arrive and leave, because it guarantees temporal isolation among independent subsets of tasks without requiring any information on their temporal parameters. Additionally, if the temporal parameters of the interacting tasks are known, it is possible to compute an upper bound to the interference suffered by a task due to other interacting tasks. Thus, it is possible to provide timing guarantees for a subset of interacting hard real-time tasks. Finally, the M-BWI protocol is neutral to the underlying scheduling policy: it can be implemented in global, clustered and semi-partitioned scheduling.

After introducing the M-BWI protocol, in this paper we formally prove its isolation properties, and propose an algorithm to compute an upper bound to the interference suffered by a task. Then, we describe our implementation of the protocol for the LITMUSRT real-time testbed, and measure its overhead. Finally, we compare M-BWI against FMLP and OMLP, two other protocols for resource sharing in multiprocessor systems.

Keywords

Resource sharing Real-time Multiprocessors Resource reservation Priority inheritance 

Supplementary material

11241_2012_9162_MOESM1_ESM.zip (645 kb)
(ZIP 645 kB)

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Copyright information

© Springer Science+Business Media, LLC 2012

Authors and Affiliations

  • Dario Faggioli
    • 1
  • Giuseppe Lipari
    • 2
  • Tommaso Cucinotta
    • 3
  1. 1.Real-Time Systems LaboratoryScuola Superiore Sant’AnnaPisaItaly
  2. 2.Laboratoire Spécification et VérificationÉcole Normal Supérieure Cachan and PRES Universud ParisCachanFrance
  3. 3.Alcatel-Lucent Bell LabsBlanchardstown Business & Technology ParkDublinIreland

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