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Modeling flow information of loops using compositional condition of controls

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Abstract

This paper proposes a flow analysis approach to provide accurate flow facts such as number of loop iterations and infeasible paths for WCET analysis. To achieve this, a novel approach to model program flows of given loops as compositional condition of controls that can model the program flow of the sequence of basic blocks on an execution path through a single loop iteration is proposed. The proposed approach builds distinct symbolic expressions each representing a path condition as conjunctions of branch conditions along the path. Then, the path conditions are formed via substituting all constituent variables of the branch conditions with symbolic expressions computing the value of these variables. The final symbolic expression will contain variables denoting theirs value at the loop entry point. Considering the change in the value of the loop variables of the path condition, the feasible values of these variables are computed and consequently the number of the loop iterations along the iteration path is determined. Applying a SMT solver to the symbolic expressions representing each path condition, all the infeasible paths along the loop body are detected. The results of applying our flow analysis approach to a number of programs addressed in the Mälardalen benchmark suite reveal the capability and efficiency of our proposed approach.

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Notes

  1. 1.

    When we use the term change in value, throughout the paper, we mean the ways a change happens. For instance, clarifying the change in value of variable \(X\) means clarifying how the value of variable \(X\) is changed in the loop body, e.g., the value of \(X\) is added by \(1 (X=X+1)\), the value of \(X\) is multiplied by another constant or variable \(m (X=X*m)\), etc. In other words, it is important to know how the value of a variable is changed in our proposed method.

  2. 2.

    This paper is a revised and expanded version of a paper entitled ’A New Approach to Determine Number of Loop Iterations for WCET Analysis’ presented at 8th International Conference on Information Technology: New Generations, ITNG 2011, Las Vegas, Nevada, USA, 11–13 April 2011.

  3. 3.

    For variable \(x\) and program point \(p\), if the value of \(x\) at \(p\) is used along some path in the CFG starting at \(p\), we say \(x\) is live at \(p\)[1]

References

  1. 1.

    Aho AV, Lam MS, Sethi R, Ullman JD (2006) Compilers, principles, techniques and tools, 2nd edn. Addison Wesley, Reading

  2. 2.

    aiT Tool (2007). http://www.absint.com

  3. 3.

    Ananian CS (2004) FLEX compiler infrastructure. http://flex.cscott.net/Harpoon

  4. 4.

    Banerjee A, Chattopadhyay S, Roychoudhury A (2013) Precise micro-architectural modeling for WCET analysis via AI+SAT. In: IEEE Real-Time and Embedded Technology and Applications Symposium pp 87–96

  5. 5.

    Bound-T (2006) Tidorum Bound-T tool homepage. www.tidorum.fi/bound-t

  6. 6.

    Burns A, Chapman R, Wellings A (1996) Combining static worst-case timing analysis and program proof. Real Time Syst J 11(2):145–171

  7. 7.

    Chapman R (1995) Static Timing Analysis and Program Proof, PhD dissertation. Univ. of York

  8. 8.

    Cullmann C, Martin F (2007) Data-flow based detection of loop bounds. In: 7th International Workshop on Worst-Case Execution Time Analysis, (WCET’2007), Pisa, Italy, July

  9. 9.

    Cytron R, Ferrante J, Rosen BK, Wegman MN, Zadeck FK (1991) Efficiently computing static single assignment form and the control dependence graph. ACM Trans Program Lang Syst 13(4):451–490

  10. 10.

    Davies J, Woodcock J (1996) Using Z: specification. Refinement and proof. Prentice Hall International Series in Computer Science, Upper Saddle River, USA

  11. 11.

    Dutertre B, de Moura LM (2006) A fast linear-arithmetic solver for DPLL(T). In: CAV, vol 4144 of LNCS. Springer, pp 81–94

  12. 12.

    Engblom J (1999) Static Properties of Commercial Embedded Real-Time Programs and Their Implication for Worst-Case Execution Time Analysis. In: Proceedings of the 5th IEEE Real-Time Technology and Applications Symposium (RTAS ’99), Vancouver, Canada, pp 46–55 June

  13. 13.

    Ermedahl A, Sandberg C, Gustafsson J, Bygde S, Lisper B (2007) Loop bound analysis based on a combination of program slicing, abstract interpretation, and invariant analysis. In: 7th International Workshop on Worst-Case Execution Time Analysis, (WCET’2007), Pisa, Italy

  14. 14.

    Gulwani S (2009) SPEED: symbolic complexity bound analysis. Comput Aided Verif LNCS 5643(2009):51–62

  15. 15.

    Gustafsson J, Betts A, Ermedahl A, Lisper B (2010) The Mälardalen WCET benchmarks - past, present and future. In: Bjrn Lisper (ed) Proceedings of 10th International Workshop on Worst-Case Execution Time Analysis (WCET2010), Brussels, Belgium, pp 137–147 July

  16. 16.

    Gustafsson J, Ermedahl A, Lisper B (2005) Towards a flow analysis for embedded system C programs. In: Proceedings of the 10th IEEE International Workshop on Object-Oriented Real-Time Dependable Systems. Washington DC, USA, pp 287–300

  17. 17.

    Gustafsson J, Ermedahl A, Sandberg C, Lisper B (2006) Automatic derivation of loop bounds and infeasible paths for WCET analysis using abstract execution. In: Proceedings of 27th IEEE Real-Time Systems Symposium (RTSS06), Rio de Janeiro, Brazil, December

  18. 18.

    Gustafsson J, Lisper B, Sandberg C, Bermudo N (2003) A tool for automatic flow analysis of C-programs for WCET calculation. In: 8th IEEE International Workshop on Object-Oriented Real-Time Dependable Systems, Guadalajara, Mexico

  19. 19.

    Healy C, Sjodin M, Rustagi V, Whalley D, Engelen R (2000) Supporting timing analysis by automatic bounding of loop iterations. J Real Time Syst 18(2–3):129–156

  20. 20.

    Henry J, Monniaux D, Moy M (2012) PAGAI: a path sensitive static analyser. Electron Notes Theor Comput Sci 289:15–25

  21. 21.

    Henties T, Hunt JJ, Locke D, Nilsen K, Schoeberl M, Vitek J (2009) Java for safety-critical applications. In: Second International Workshop on the Certification of Safety-Critical Software Controlled Systems (Safecert 2009), York, UK

  22. 22.

    Kennedy R, Chan S, Liu SM, Lo R, Peng T, Chow F (1999) Partial redundancy elimination in SSA Form. ACM Trans Program Lang 21(3):627–676

  23. 23.

    Kim TH, Bang H, Cha SD (2010) A systematic representation of path constraints for implicit path enumeration technique. SoftwTest Verif Reliab 20(1):39–61

  24. 24.

    Kligerman E, Stoyenko A (1986) Real-time Euclid: a language for reliable real-time systems. IEEE Trans Softw Eng 12(9):941–949

  25. 25.

    Knoop J, Kovcs L, Zwirchmayr J (2012) Symbolic Loop Bound Computation for WCET Analysis. In: Perspectives of Systems Informatics of LNCS, vol 7162. Springer, pp 227–242

  26. 26.

    Li YS, Malik S, Wolfe A (1995) Efficient microarchitecture modeling and path analysis for real-time software. In: Proceedings of the Sixteenth IEEE Real-Time Systems Symposium Pisa, Italy, pp 298–307

  27. 27.

    Lokuciejewski P, Cordes D, Falk H, Marwedel P (2009) A Fast and Precise Static Loop Analysis based on Abstract Interpretation, Program Slicing and Polytope Models. In: International Symposium on Code Generation and Optimization (CGO), USA, pp 136–146

  28. 28.

    Michiel M, Bonenfant A, Cass H, Sainrat P (2008) Static loop bound analysis of C programs based on flow analysis and abstract interpretation. In: IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA). Kaohsiung, Taiwan, pp 161–166

  29. 29.

    Min-Allah N, Ullah Khan S (2012) Optimal task execution times for periodic tasks using nonlinear constrained optimization. J Supercomput 59(3):1120–1138

  30. 30.

    Moura LM de, Bjørner N (2008) Z3: An efficient SMT solver. In: TACAS of LNCS, vol 4963. Springer, pp 337–340

  31. 31.

    Park C, Shaw AC (1991) Experiments with a program timing tool based on a source-level timing schema. Computer 24(5):48–57

  32. 32.

    Puschner P, Burns A (2002) Writing temporally predictable code. In: Proceedings of the The Seventh IEEE International Workshop on Object-Oriented Real-Time Dependable Systems (WORDS 2002), p 85

  33. 33.

    Puschner P, Koza C (1989) Calculating the maximum execution time of real-time programs. Real Time Syst J 1(2):159–176

  34. 34.

    Rieder B, Wenzel I, Puschner P (2008) Using model checking to derive loop bounds of general loops within ANSI-C applications for measurement based WCET analysis. In: Proceedings of 6th International Workshop on Intelligent Solutions in Embedded Systems (WISES 2008), Regensburg, Germany

  35. 35.

    Sandberg C, Ermedahl A, Gustafsson J, Lisper B (2006) Faster WCET flow analysis by program slicing. In: Proceedings of ACM SIGPLAN Conference on Languages, Compilers and Tools for Embedded Systems (LCTES06), pp 103–112

  36. 36.

    Thesing S (2004) Safe and Precise WCET Determination by Abstract Interpretation of Pipeline Models. Ph.D. thesis, Saarland University

  37. 37.

    Yices tool page(2014). http://yices.csl.sri.com/

  38. 38.

    Wang H-C, Woungang I, Yao C-W, Anpalagan A, Obaidat MS (2012) Energy-efficient tasks scheduling algorithm for real-time multiprocessor embedded systems. J Supercomput 62:967–988

  39. 39.

    Wilhelm R, Engblom J, Ermedahl A, Holsti N, Thesing S, Whalley D, Bernat G, Ferdinand C, Heckmann R, Mitra T, Mueller F, Puaut I, Puschner P, Staschulat J, Stenstrm P (2008) The worst-case execution time problem—overview of approaches and survey of tools. Trans Embed Comput Syst 7(3):1–53

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Correspondence to Mehdi Sakhaei-nia.

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Parsa, S., Sakhaei-nia, M. Modeling flow information of loops using compositional condition of controls. J Supercomput 71, 508–536 (2015). https://doi.org/10.1007/s11227-014-1308-5

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Keywords

  • Loop bound analysis
  • WCET
  • Timing analysis
  • Real-time systems