The Journal of Supercomputing

, Volume 66, Issue 3, pp 1489–1506 | Cite as

Virtual machine consolidation based on interference modeling

Article

Abstract

Server consolidation is very attractive for cloud computing platforms to improve energy efficiency and resource utilization. Advances in multi-core processors and virtualization technologies have enabled many workloads to be consolidated in a physical server. However, current virtualization technologies do not ensure performance isolation among guest virtual machines, which results in degraded performance due to contention in shared resources along with violation of service level agreement (SLA) of the cloud service. In that sense, minimizing performance interference among co-located virtual machines is the key factor of successful server consolidation policy in the cloud computing platforms. In this work, we propose a performance model that considers interferences in the shared last-level cache and memory bus. Our performance interference model can estimate how much an application will hurt others and how much an application will suffer from others. We also present a virtual machine consolidation method called swim which is based on our interference model. Experimental results show that the average performance degradation ratio by swim is comparable to the optimal allocation.

Keywords

Virtual machine Server consolidation Resource contention Performance interference model 

References

  1. 1.
    Intel Core i7-950 Nehalem architecture processor. http://goo.gl/ZYvhO
  2. 2.
    KVM (Kernel-based Virtual Machine). http://www.linux-kvm.org/
  3. 3.
  4. 4.
    Barham P, Dragovic B, Fraser K, Hand S, Harris T, Ho A, Neugebauer R, Pratt I, Warfield A (2003) Xen and the art of virtualization. In: Proceedings of SOSP ’03, New York, NY, USA Google Scholar
  5. 5.
    Cho S, Jin L (2006) Managing distributed, shared l2 caches through os-level page allocation. In: Proceedings of the 39th annual IEEE/ACM international symposium on microarchitecture, MICRO ’39. IEEE Comput Soc, Washington, pp 455–468 Google Scholar
  6. 6.
    Citrix: XenServer. http://www.citrix.com/
  7. 7.
    David H, Fallin C, Gorbatov E, Hanebutte UR, Mutlu O (2011) Memory power management via dynamic voltage/frequency scaling. In: Proceedings of the 8th ACM international conference on autonomic computing, ICAC ’11. ACM, New York, pp 31–40 CrossRefGoogle Scholar
  8. 8.
    Govindan S, Liu J, Kansal A, Sivasubramaniam A (2011) Cuanta: quantifying effects of shared on-chip resource interference for consolidated virtual machines. In: Proceedings of the 2nd ACM Symposium on Cloud Computing (SOCC) Google Scholar
  9. 9.
    Gupta D, Cherkasova L, Gardner R, Vahdat A (2006) Enforcing performance isolation across virtual machines in xen. In: Proceedings of the ACM/IFIP/USENIX 2006 international conference on middleware, Melbourne, Australia Google Scholar
  10. 10.
    Intel and VMware: Intelligent queueing technologies for virtualization. http://www.vmware.com/files/pdf/partners/intel/vmdq-white-paper-wp.pdf
  11. 11.
    Intel Corporation: Single-chip Cloud Computer. http://techresearch.intel.com/ProjectDetails.aspx?Id=1
  12. 12.
    Jaleel A, Borch E, Bhandaru M, Steely SC Jr., Emer J (2010) Achieving non-inclusive cache performance with inclusive caches: temporal locality aware (tla) cache management policies. In: Proceedings of the 2010 43rd annual IEEE/ACM international symposium on microarchitecture, MICRO ’43, pp 151–162 CrossRefGoogle Scholar
  13. 13.
    Mars J, Tang L, Hundt R, Skadron K, Soffa ML (2011) Bubble-up: increasing sensible co-locations for improved utilization in modern warehouse scale computers. In: Proceedings of the 44th annual IEEE/ACM international symposium on microarchitecture (MICRO) Google Scholar
  14. 14.
  15. 15.
    Mutlu O, Moscibroda T (2008) Parallelism-aware batch scheduling: enhancing both performance and fairness of shared dram systems. In: Proceedings of the 35th annual international symposium on computer architecture, ISCA ’08. IEEE Comput Soc, Washington, pp 63–74 Google Scholar
  16. 16.
    Nesbit KJ, Laudon J, Smith JE (2007) Virtual private caches. In: Proceedings of the 34th annual international symposium on computer architecture, ISCA ’07. ACM, New York, pp 57–68 CrossRefGoogle Scholar
  17. 17.
    Qureshi MK, Jaleel A, Patt YN, Steely SC, Emer J (2007) Adaptive insertion policies for high performance caching. In: Proceedings of the 34th annual international symposium on computer architecture, ISCA ’07, pp 381–391 CrossRefGoogle Scholar
  18. 18.
    Qureshi MK, Patt YN (2006) Utility-based cache partitioning: a low-overhead, high-performance, runtime mechanism to partition shared caches. In: Proceedings of the 39th annual IEEE/ACM international symposium on microarchitecture, Orlando, FL, USA Google Scholar
  19. 19.
    Schuff DL, Kulkarni M, Pai VS (2010) Accelerating multicore reuse distance analysis with sampling and parallelization. In: Proceedings of the 19th international conference on parallel architectures and compilation techniques, PACT ’10, pp 53–64 CrossRefGoogle Scholar
  20. 20.
    Smaragdakis Y, Kaplan S, Wilson P (1999) Eelru: simple and effective adaptive page replacement. In: Proceedings of the 1999 ACM SIGMETRICS international conference on measurement and modeling of computer systems, SIGMETRICS ’99, pp 122–133 CrossRefGoogle Scholar
  21. 21.
    Standard Performance Evaluation Corporation: SPEC CPU2006. http://www.spec.org/cpu2006/
  22. 22.
    Tam DK, Azimi R, Soares LB, Stumm M (2009) Rapidmrc: approximating l2 miss rate curves on commodity systems for online optimizations. In: Proceedings of the 14th international conference on architectural support for programming languages and operating systems, ASPLOS ’09. ACM, New York, pp 121–132 CrossRefGoogle Scholar
  23. 23.
    Tilera Corporation: TILE-Gx Processor Family. http://www.tilera.com/products/processors/TILE-Gx_Family
  24. 24.
    Zhang J, Sivasubramaniam A, Wang Q, Riska A, Riedel E (2006) Storage performance virtualization via throughput and latency control. Transf Storage 2:283–308 CrossRefGoogle Scholar
  25. 25.
    Zhang X, Dwarkadas S, Shen K (2009) Towards practical page coloring-based multicore cache management. In: Proceedings of the 4th ACM European conference on computer systems (EuroSys) Google Scholar
  26. 26.
    Zhuravlev S, Blagodurov S, Fedorova A (2010) Addressing shared resource contention in multicore processors via scheduling. In: Proceedings of the fifteenth edition of ASPLOS on architectural support for programming languages and operating systems, ASPLOS ’10. ACM, New York, pp 129–142 CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media New York 2013

Authors and Affiliations

  1. 1.School of Computer Science and EngineeringSeoul National UniversitySeoulKorea

Personalised recommendations