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The Journal of Supercomputing

, Volume 66, Issue 1, pp 364–380 | Cite as

Resource-efficient utilization of CPU/GPU-based heterogeneous supercomputers for Bayesian phylogenetic inference

  • Jun Chai
  • Huayou Su
  • Mei Wen
  • Xing Cai
  • Nan Wu
  • Chunyuan Zhang
Article

Abstract

Bayesian inference is one of the most important methods for estimating phylogenetic trees in bioinformatics. Due to the potentially huge computational requirements, several parallel algorithms of Bayesian inference have been implemented to run on CPU-based clusters, multicore CPUs, or small clusters of CPUs and GPUs. To the best of our knowledge, however, none of the existing methods is able to simultaneously and fully utilize both CPUs and GPUs for the computations, leaving idle either the CPU part or the GPU part of modern heterogeneous supercomputers. Aiming at an optimized utilization of heterogeneous computing resources, which is a promising hardware architecture for future bioinformatics applications, we present a new hybrid parallel algorithm and implementation of Bayesian phylogenetic inference, which combines MPI, OpenMP, and CUDA programming. The novelty of our algorithm, denoted as oMC3, is its ability of using CPU cores simultaneously with GPUs for the computations, while ensuring a fair work division between the two types of hardware components. We have implemented oMC3 based on MrBayes, which is one of the most popular software packages for Bayesian phylogenetic inference. Numerical experiments show that oMC3 obtains 2.5× speedup over nMC3, which is a cutting-edge GPU implementation of MrBayes, on a single server consisting of two GPUs and sixteen CPU cores. Moreover, oMC3 scales nicely when 128 GPUs and 1536 CPU cores are in use.

Keywords

Bayesian inference CPU/GPU-based heterogeneous Supercomputer Hybrid programming Resource-efficient utilization 

Notes

Acknowledgements

The authors gratefully acknowledge the support from National Natural Science Foundation of China under NSFC Nos. 61033008, 60903041, and 61103080, Research Fund for the Doctoral Program of Higher Education of China under SRFDP No. 20104307110002, Hunan Provincial Innovation Foundation for Postgraduate under No. CX2010B028, Fund of Innovation in Graduate School of NUDT under No. B100603, and Research Grant No. 214113 from the Research Council of Norway. We also acknowledge the experimental platform support from the National Supercomputing Center in Changsha.

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Copyright information

© Springer Science+Business Media New York 2013

Authors and Affiliations

  • Jun Chai
    • 1
  • Huayou Su
    • 1
  • Mei Wen
    • 1
  • Xing Cai
    • 2
    • 3
  • Nan Wu
    • 1
  • Chunyuan Zhang
    • 1
  1. 1.School of ComputerNational University of Defense TechnologyChangshaP.R. China
  2. 2.Simula Research LaboratoryLysakerNorway
  3. 3.Department of InformaticsUniversity of OsloOsloNorway

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