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Performance evaluation of a real-time grid system using power-saving capable processors

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Abstract

The need to improve power management in Grids is becoming essential for environmental-ecological and economical reasons. Applications need more computational power and power costs are increasing. This paper studies the benefits in power consumption that come from the use of power-saving modern processors that can adjust their operating frequency depending on the workload, in a real-time 2-level grid system. We propose resource scheduling policies based on energy consumption criteria. A simulation model is used to evaluate performance of these policies at the grid level and at the local level. Our experimental results show around 30% savings in processors’ power consumption while maintaining performance at satisfactory levels.

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References

  1. 1.

    Benini L, Bogliolo A, Micheli GD (2000) A survey of design techniques for system-level dynamic power management. IEEE Trans Very Large Scale Integr (VLSI) Syst 8(3):299–316

  2. 2.

    Weiser M, Welch B, Demers A, Shenker S (1994) Scheduling for reduced cpu energy. In: USENIX symposium operating systems design and implementation

  3. 3.

    Yao F, Demers A, Shenker S (1995) A scheduling model for reduced CPU energy. In: Proceedings of the 36th annual symposium on foundations of computer science (FOCS ’95). IEEE Computer Society, Washington, p 374

  4. 4.

    Sudha Anil Kumar G, Manimaran G (2005) An intra-task DVS algorithm exploiting path probabilities for real-time systems. SIGBED Rev 2(2):7–10

  5. 5.

    Gheorghita SV, Basten T, Corporaal H (2005) Intra-task scenario-aware voltage scheduling. In: Proceedings of the 2005 international conference on compilers, architectures and synthesis for embedded systems (CASES ’05). ACM Press, New York, pp 177–184

  6. 6.

    Seo J, Kim T, Dutt ND (2005) Optimal integration of inter-task and intra-task dynamic voltage scaling techniques for hard real-time applications. In: Proceedings of the 2005 IEEE/ACM international conference on computer-aided design (ICCAD ’05). IEEE Computer Society, Washington, pp 450–455

  7. 7.

    Xian C, Lu YH (2006) Dynamic voltage scaling for multitasking real-time systems with uncertain execution time. In: Proceedings of the 16th ACM Great Lakes symposium on VLSI (GLSVLSI ’06). ACM Press, New York, pp 392–397

  8. 8.

    Xu R, Mosse D, Melhem R (2007) Minimizing expected energy consumption in real-time systems through dynamic voltage scaling. ACM Trans Comput Syst 25(4):Article 9

  9. 9.

    Niu L, Quan G (2004) Reducing both dynamic and leakage energy consumption for hard real-time systems. In: Proceedings of the 2004 international conference on compilers, architecture, and synthesis for embedded systems (CASES ’04). ACM Press, New York, pp 140–148

  10. 10.

    Zhuo J, Chakrabarti C (2008) Energy-efficient dynamic task scheduling algorithms for DVS systems. ACM Trans Embed Comput Syst 7(2):Article 17

  11. 11.

    Kim W, Kim J, Min SL (2004) Preemption-aware dynamic voltage scaling in hard real-time systems. In: Proceedings of the 2004 international symposium on low power electronics and design (ISLPED ’04). ACM Press, New York, pp 393–398

  12. 12.

    Zhong X, Xu, CZ (2007) Frequency-aware energy optimization for real-time periodic and aperiodic tasks. In: Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on languages, compilers, and tools for embedded systems (LCTES ’07). ACM Press, New York, pp 21–30

  13. 13.

    Zhong X, Xu, CZ (2008) System-wide energy minimization for real-time tasks: Lower bound and approximation. ACM Trans Embed Comput Syst 7(3):Article 28

  14. 14.

    Devadas V, Aydin, H (2008) On the interplay of dynamic voltage scaling and dynamic power management in real-time embedded applications. In: Proceedings of the 8th ACM international conference on embedded software (EMSOFT ’08). ACM Press, New York, pp 99–108

  15. 15.

    Zhao B, Aydin H (2009) Minimizing expected energy consumption through optimal integration of DVS and DPM. In: Proceedings of the 2009 international conference on computer-aided design (ICCAD ’09). ACM Press, New York, pp 449–456

  16. 16.

    Rong P, Pedram M (2006) Power-aware scheduling and dynamic voltage setting for tasks running on a hard real-time system. In: Proceedings of the 2006 Asia and South Pacific design automation conference (ASP-DAC ’06). IEEE Press, Piscataway, pp 473–478

  17. 17.

    Zikos S, Karatza H (2011) Performance and energy aware cluster-level scheduling of compute-intensive jobs with unknown service times. Simul Model Pract Theory 19(2011):239–250

  18. 18.

    Law AM, Kelton WD (2000) Simulation modeling & analysis. McGraw-Hill, New York

  19. 19.

    Papazachos ZC, Karatza HD (2010) Performance evaluation of bag of gangs scheduling in a heterogeneous distributed system. J Syst Softw 83(8):1346–1354

  20. 20.

    Stavrinides GL, Karatza H (2010) Scheduling multiple task graphs with end-to-end deadlines in distributed real-time systems utilizing imprecise computations. J Syst Softw 83(6):1004–1014

  21. 21.

    Zikos S, Karatza H (2008) Resource Allocation Strategies in a 2-Level Hierarchical Grid System. In: Proceedings of the 41st annual simulation symposium (ANSS-41 2008) (ANSS-41 ’08). IEEE Computer Society, Washington, pp 157–164

  22. 22.

    Intel and Core i7 (Nehalem) (2011) Dynamic Power Management. Recovered 30/1/2011 from World Wide Web: http://cs466.andersonje.com/public/pm.pdf

  23. 23.

    Enhanced Intel® (2004) SpeedStep® Technology for the Intel® Pentium® M Processor White Paper, March 2004. Recovered 30/1/2011 from World Wide Web: ftp://download.intel.com/design/network/papers/30117401.pdf

  24. 24.

    Pentium M. (2011) Recovered 30/1/2011 from World Wide Web: http://en.wikipedia.org/wiki/Pentium_M

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Correspondence to George Terzopoulos.

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Terzopoulos, G., Karatza, H. Performance evaluation of a real-time grid system using power-saving capable processors. J Supercomput 61, 1135–1153 (2012). https://doi.org/10.1007/s11227-011-0689-y

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Keywords

  • Performance
  • Simulation
  • Grid
  • Power-saving