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The Journal of Supercomputing

, Volume 57, Issue 1, pp 99–108 | Cite as

Improving IPS by network processors

  • Pablo Cascón
  • Julio Ortega
  • Yan Luo
  • Eric Murray
  • Antonio Díaz
  • Ignacio Rojas
Article

Abstract

Many present applications usually require high communication throughputs. Multiprocessor nodes and multicore architectures, as well as programmable NICs (Network Interface Cards) provide new opportunities to take advantage of the available multigigabits per second link bandwidths. Nevertheless, to achieve adequate communication performance levels efficient parallel processing of network tasks and interfaces should be considered. In this paper, we leverage network processors as heterogeneous microarchitectures with several cores that implement multithreading and are suited for packet processing, to investigate on the use of parallel processing to accelerate the network interface, and thus the network applications developed above it. More specifically, we have implemented an intrusion prevention system (IPS) with such a network processor. We describe the IPS we have developed that after its offloaded implementation allows faster packet processing of both normal and corrupted traffic. The benefits from placing the IPS close to the network, by using specialized network processors, give many times lower latency and higher bandwidth available to the legitimate traffic.

Keywords

Network processors Offloading IPS Parallel network interface Multithreading 

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Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  • Pablo Cascón
    • 1
  • Julio Ortega
    • 1
  • Yan Luo
    • 2
  • Eric Murray
    • 2
  • Antonio Díaz
    • 1
  • Ignacio Rojas
    • 1
  1. 1.Department of Computer Architecture and TechnologyUniversity of GranadaGranadaSpain
  2. 2.Department of Electrical and Computer EngineeringUniversity of Massachusetts LowellLowellUSA

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