AWG and EDFA based optical packet switch using feedback shared loop buffer memory
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Optical packet switching provides high speed, data rate/format transparency, efficient use of bandwidth and flexibility. The major problem in the implementation of “all-optical” switching is contention which occurs when two or more packets arrive at the same time for the same destination. To resolve the contention, we have proposed an optical packet switch architecture based on WDM loop buffer memory in the feedback configuration. In that architecture, the contending packets are stored in a loop buffer module, and routed in the free time slots. The buffering duration in the recirculating loop is limited by a circulation limit. The analysis was been done to obtain the maximum number of allowed circulations. This paper proposes improved version of that optical packet switch architecture, to increase the number of maximum allowed circulations. The modification is done either by adding an extra erbium doped fiber amplifier (EDFA) in the original switch or by replacing the core space switch with arrayed waveguide grating (AWG). The performance analysis has been done by the simulations.
KeywordsOptical buffering Loop buffer memory Optical packet switch
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