ARM-embedded implementation of a video chaotic secure communication via WAN remote transmission with desirable security and frame rate
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Existing H.264 codec-based video chaotic encryption schemes can be attributed to two classes: the original video data are encrypted with chaos before H.264 encoding; it is encrypted with chaos during H.264 encoding. The main disadvantage of the two classes of schemes is that the contradictory issue between desirable security and fast frame rate is not solved well. To cope with the problem, this paper presents a novel H.264 codec-based video chaotic encryption scheme, where the original video data are encrypted by a stream cipher and position scrambling with chaos after H.264 encoding. In particular, hardware H.264 encoding, multi-core multi-threading process, H.264 data format protection, and adaptive memory selection strategy are adopted to make the proposed scheme implemented successfully. Moreover, security of the chaotic stream cipher is enhanced by introducing a nonlinear nominal matrix. ARM-embedded hardware implementation results via WAN remote transmission demonstrated that the proposed scheme can provide a practical solution for H.264 codec-based video secure communications owning desirable security and fast frame rate.
KeywordsChaotic encryption H.264 codec ARM H.264 data format protection Adaptive memory selection Multi-core multi-threading process
This work was supported by the National Natural Science Foundation of China (no. 61172023, 61532020), the Science and Technology Planning Project of Guangzhou (no. 20151001036), and the Hunan Provincial Natural Science Foundation of China (no. 2015JJ1013).
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