Analytical thermal stress model for a typical flip-chip (FC) package design

  • E. SuhirEmail author


A simple analytical thermal stress model is suggested for a typical flip-chip (FC) lidded package design. The model is based on the concept of the interfacial compliance. The addressed design consists of a silicon FC bonded to an organic substrate and covered by a lid. The lid is configured in such a way that its mid-portion is bonded to the back side of the chip using a thermal interface material (a heat sink is intended to be subsequently mounted on the outer surface of the lid) and the lid’s peripheral portions are adhesively bonded to the same substrate using compliant attachments around the lid’s perimeter. A copper lid and a (hypothetical) organic lid are considered to develop a general feeling of the possible stress relief that could be expected if an organic lid is employed. The in-plane compliances of all the attachments, including the effective compliance of the encapsulated solder joint interconnections, are taken into account. A numerical example shows how the model could be used in practical computations. It shows also that the application of an organic lid, although is less attractive from the standpoint of the thermal management of the design, might result in appreciably lower thermal stresses. This is true for both the normal stresses in the chip’s cross-sections and the maximum interfacial shearing stresses at the chip’s ends. The developed model can be employed in the analysis of a FC package design of the type in question. Future work should include FEA verifications, and the suggested analytical stress model can be of help when developing a FEA preprocessing simulation model.


  1. 1.
    G.A. Lang et al., Thermal fatigue in silicon power devices. IEEE Trans. Electron Devices, 17, 787–793 (1970)CrossRefGoogle Scholar
  2. 2.
    E. Suhir, in Advances in Thermal Modeling of Electronic Components and Systems, ed. by A. Bar-Cohen, A. D. Kraus. Thermal Stress Failures in Microelectronic Components—Review and Extension, (Hemisphere, New York, 1988)Google Scholar
  3. 3.
    J.H. Lau (ed.), Thermal Stress and Strain in Microelectronics Packaging. (Van-Nostrand Reinhold, New York, 1993)Google Scholar
  4. 4.
    S. Timoshenko, Analysis of Bi-metal thermostats. J. Opt. Soc. Am. 11, 223–255 (1925)CrossRefGoogle Scholar
  5. 5.
    B.J. Aleck, Thermal stresses in a rectangular plate clamped along an edge. ASME J. Appl. Mech. 16, 118–122 (1949)Google Scholar
  6. 6.
    B.A. Boley, J.H. Weiner, Theory of Thermal Stresses. (Quantum Publishers, New York, 1974)Google Scholar
  7. 7.
    E. Suhir, Analytical thermal stress modeling in electronic and photonic systems. ASME App. Mech. Reviews, invited paper, vol. 62, 4 (2009)Google Scholar
  8. 8.
    E. Suhir, Structural Analysis in Microelectronic and Fiber Optic Systems”, vol.1, Basic Principles of Engineering Elasticity and Fundamentals of Structural Analysis. (Van Nostrand Reinhold, New York, 1991)Google Scholar

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© Springer Science+Business Media, LLC, part of Springer Nature 2017

Authors and Affiliations

  1. 1.Portland State UniversityPortlandUSA
  2. 2.Technical UniversityViennaAustria
  3. 3.ERS Co.Los AltosUSA

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