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Journal of Electronic Testing

, Volume 33, Issue 6, pp 751–767 | Cite as

Evaluating the Effectiveness of D-chains in SAT-based ATPG and Diagnostic TPG

  • Pascal RaiolaEmail author
  • Jan Burchard
  • Felix Neubauer
  • Dominik Erb
  • Bernd Becker
Article
  • 164 Downloads

Abstract

The ever increasing size and complexity of today’s Very-Large-Scale-Integration (VLSI) designs requires a thorough investigation of new approaches for the generation of test patterns for both test and diagnosis of faults. SAT-based automatic test pattern generation (ATPG) is one of the most popular methods, where, in contrast to classical structural ATPG methods, first a mathematical representation of the problem in form of a Boolean formula is generated, which is then evaluated by a specialized solver. If the considered fault is testable, the solver will return a satisfying assignment, from which a test pattern can be extracted; otherwise no such assignment can exist. In order to speed up test pattern generation, the concept of D-chains was introduced by several researchers. Thereby supplementary clauses are added to the Boolean formula, reducing the search space and guiding the solver toward the solution. In the past, different variants of D-chains have been developed, such as the backward D-chain or the indirect D-chain. In this work we perform a thorough analysis and evaluation of the D-chain variants for test pattern generation and also analyze the impact of different D-chain encodings on diagnostic test pattern generation. Our experimental results show that depending on the incorporated D-chain the runtime can be reduced tremendously.

Keywords

Automatic test pattern generation D-chain SAT-based ATPG Test pattern generation for diagnosis 

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Copyright information

© Springer Science+Business Media, LLC, part of Springer Nature 2017

Authors and Affiliations

  1. 1.Computer ArchitectureUniversity of FreiburgFreiburg (Breisgau)Germany
  2. 2.Infineon Technologies AGNeubibergGermany

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