Journal of Electronic Testing

, Volume 31, Issue 3, pp 321–327 | Cite as

One More Class of Sequential Circuits having Combinational Test Generation Complexity

  • Debesh Kumar DasEmail author
  • Hideo Fujiwara


The paper uses the concept of time expansion model to find the test generation for acyclic sequential circuits. Any acyclic sequential circuit without hold registers can be tested with combinational test generation complexity using this model. We show that for acyclic sequential circuits having hold registers, a subset of such circuits can also be tested with this complexity. We define the max-testable class of sequential circuits that includes both these groups. The paper also suggests an algorithm to find such class of circuits.


Acyclic sequential circuits Hold registers Combinational test generation Time expansion model 


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Copyright information

© Springer Science+Business Media New York 2015

Authors and Affiliations

  1. 1.Computer Science and Engineering DepartmentJadavpur UniversityCalcuttaIndia
  2. 2.Faculty of InformaticsOsaka Gakuin UniversityOsakaJapan

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