Journal of Electronic Testing

, Volume 22, Issue 1, pp 61–69 | Cite as

Automatic Test Pattern Generation for Resistive Bridging Faults

  • Piet EngelkeEmail author
  • Ilia Polian
  • Michel Renovell
  • Bernd Becker


An ATPG for resistive bridging faults in combinational or full-scan circuits is proposed. It combines the advantages of section-based generation and interval-based simulation. In contrast to the solutions introduced so far, it can handle static effects of arbitrary non-feedback bridges between two nodes, including ones detectable at higher bridge resistance and undetectable at lower resistance, and faults requiring more than one vector for detection. The developed tool is applied to ISCAS circuits, and a higher efficiency compared with other resistive bridging fault as well as stuck-at ATPG is reported. Information required for accurate resistive bridging fault simulation is obtained as a by-product.


ATPG resistive short defects bridging faults SAT 


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Copyright information

© Springer Science + Business Media, Inc 2006

Authors and Affiliations

  • Piet Engelke
    • 1
    Email author
  • Ilia Polian
    • 1
  • Michel Renovell
    • 2
  • Bernd Becker
    • 1
  1. 1.Institute of Computer ScienceAlbert-Ludwigs-UniversityFreiburg im BreisgauGermany
  2. 2.LIRMM – UMIIMontpellierFrance

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