Analytical modeling for static and dynamic response of organic pseudo all-p inverter circuits
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This paper presents the performance analysis of an all-p-organic pseudo-inverter circuit using dual gate organic thin film transistors. The proposed inverter design has shown significantly high performance in terms of noise margin, gain and propagation delay, leading to the design of more robust digital circuits that, too, exhibit augmented performance. The parameters of the all-p-organic pseudo-inverter are compared with those of zero-Vgs load logic (ZVLL) and dynamic load logic based conventional inverters, and a substantial improvement is found for the novel combination of a dual gate flexible TFT with a pseudo-design. Performance parameters were deeply analyzed, and we observed that the noise margin is improved by 42.8% as compared to ZVLL based conventional inverters. A bootstrap technique was implemented to further improve the performance and reduce the threshold voltage drop. The performance parameters were analyzed mathematically and compared with simulated values. The static as well as dynamic characteristics of organic pseudo-all-p inverter, with and without bootstrap technique, were observed. Static power consumption of the organic pseudo-all-p inverter was estimated. In this way, improvement of noise margin by the bootstrap circuit of the organic pseudo-inverter is characterized. The reduced threshold voltage applied to design of low power circuits enables longer power backup for various applications.
KeywordsBootstrapping Dual gate Noise margin Organic pseudo-inverter Organic thin film transistor Power consumption
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