Impact of contact resistance on memory window in phase-change random access memory (PCRAM)

Abstract

This paper investigates the impact of contact resistance on the memory window in phase-change random access memories (PCRAMs) using $\hbox {Ge}_{2}\hbox {Se}_{2}\hbox {Te}_{5}$ (GST). We discuss the increase of contact resistance, as device is scaled down to a nanometer size and the effects of contact resistivity changes with respect to the resistance window between the set and reset states. In a contact area of $400 \,\hbox {nm}^{2}$, the contact resistance in the set state occupies more than 80 % of the total resistance, and the occupied area increases as the contact area is scaled upward. The memory window is significantly degraded as the set resistance increases because of the increasing contact resistance. To maintain the memory window with more than two orders of magnitude of the resistance in a $100 \,\hbox {nm}^{2}$ area, the contact resistance should be decreased to less than 60 % of that of a $400\, \hbox {nm}^{2}$ area by reducing contact resistivity or by some other method. We examine the reduction of contact resistance achieved by adopting a three-dimensional contact structure, and we propose this structure as a candidate for the scaled PCRAM.