Monte Carlo study of self-heating in nanoscale devices
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- Sadi, T., Kelsall, R.W., Pilgrim, N.J. et al. J Comput Electron (2012) 11: 118. doi:10.1007/s10825-012-0395-x
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Progress in device miniaturization combined with the increase in integrated circuit packing density, as described by Moore’s law, have been accompanied by an exponential increase in on-chip heat generation. In this context, there is an increasing demand for reliable electrothermal modeling techniques that accurately account for self-heating and allow a better understanding of thermal transport at the nanoscale. This paper presents a theoretical demonstration of the electrothermal phenomena in a variety of nanodevices, ranging from conventional Si- and III-V-based field-effect transistors (FETs) to nanowire devices. Simulation work relies on a very well-established Monte Carlo simulator considering self-heating using phonon statistics. The electrothermal simulator self-consistently couples a three-dimensional (3D) electronic trajectory simulation with the solution of the heat diffusion equation. The Monte Carlo technique is very suitable for the simulation of electronic transport in nanoscale semiconductor devices, as it is free from low-field near-equilibrium approximations. In addition, the method is well-suited for electrothermal modeling, since it allows a detailed microscopic description of electron-phonon scattering which provides an inherent and direct prediction of the spatial distribution of heat generation. The paper is divided into three parts. The first part includes a description of the computational approach to simulate electrothermal transport in FETs. The advantages of using the simulation method are demonstrated by presenting full results from the simulation of an InGaAs-channel high-electron mobility transistor (HEMT). The second part concerns electrothermal transport in conventional field-effect devices such as Si and III-V HEMTs. An investigation of self-heating effects in high-power devices, such as AlGaN/GaN HEMTs, and relevant Si-based FETs, e.g. Si/SiGe HEMTs, is presented. This part demonstrates how the analysis of self-heating effects may help us in understanding the electronic and thermal properties of nanoscale FETs. The third part of the paper consists of studying the electrothermal behavior of advanced structures. In this case, charge transport and self-heating effects are investigated in metal-insulator-semiconductor FETs (MISFETs) with a single InAs nanowire channel. Despite low heat dissipation, simulations predict significant local temperatures, due to the high current density levels and the poor thermal management in these nanowire structures.