Journal of Computational Electronics

, Volume 7, Issue 3, pp 181–186 | Cite as

CMOS performance enhancement in Hybrid Orientation Technologies

  • Tapas Kumar Maiti
  • Satyasopan Mahato
  • Pinaki Chakraborty
  • Chinmay Kumar Maiti
  • Subir Kumar Sarkar
Article
First Online:
Received:
Accepted:

Abstract

Possible MOSFET performance enhancement by combining the hybrid-orientation technology (HOT) and process-induced local strain engineering is predicted for sub-45-nm CMOS technology nodes via technology CAD (TCAD) simulation. Mobility enhancements are modeled for both the hybrid orientation and process-induced local strain in CMOS technologies and are used in simulation. RF performance is investigated in detail and peak cutoff frequency, f T of 524 GHz for n-MOSFETs and 239 GHz for p-MOSFETs are predicted from simulation.

Keywords

Hybrid Orientation Technology Technology CAD Process-induced strain CMOS integrated circuits Mobility Strained-Si 
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Copyright information

© Springer Science+Business Media LLC 2008

Authors and Affiliations

  • Tapas Kumar Maiti
    • 1
  • Satyasopan Mahato
    • 1
  • Pinaki Chakraborty
    • 1
  • Chinmay Kumar Maiti
    • 1
  • Subir Kumar Sarkar
    • 2
  1. 1.Electronics and ECE DepartmentIIT KharagpurKharagpurIndia
  2. 2.ETCE DepartmentJadavpur UniversityKolkataIndia

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