RF Performance of Strained SiGe pMOSFETs: Linearity and Gain
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The RF performance of strained-SiGe pMOSFETs on SOI substrates has been investigated through the use of TCAD simulations. To optimize RF performance of strained-SiGe pMOSFETs, including intrinsic gain, linearity and g m /I d , we propose to vary the Ge concentration in the channel, shrink the SOI thickness and adopt an asymmetric doping profile along the channel. We find that neither strain nor the asymmetric doping approach is able to unlock the trade-off between intrinsic gain and linearity found in bulk and SOI relaxed Si MOSFETs. Instead, SOI layer thickness control provides an alternative approach to improving gain without sacrificing linearity. For optimized RF performance, the strained-SiGe pMOSFETs with high Ge concentrations (0.3 ≤ x ≤ 0.7) in the channel and thin SOI layers (< 20 nm) are preferred.
Keywordslinearity intrinsic gain gm/Id MOSFET device simulations strained SiGe RF CMOS SOI
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- 1.B. Yu, IEDM Tech. Dig., 937 (2001).Google Scholar
- 2.K. Rim, IEDM Tech. Dig., 43 (2002).Google Scholar
- 3.T. Mizuno, et al., IEDM Tech. Dig., 31 (2002).Google Scholar
- 4.P. H. Woerlee, et al., IEEE Trans. Electron Dev., 1776 (2001).Google Scholar
- 5.B. Lee, et al., IEDM Tech. Dig., 946 (2002).Google Scholar
- 6.B. Cheng, et al., IEEE Int. SOI Conference, 113 (1998).Google Scholar
- 7.ISE System Inc., TCAD suite, http://www.ise.com
- 8.W. Ma, S. Kaya, and A. Asenov, Proc. of EDMO, 255 (2003).Google Scholar
- 9.V. Kilchytska, et al., IEEE Trans. Electron Dev., 50 (2003), and references therein.Google Scholar
- 10.B. Razavi, RF Microelectronics (Prentice-Hall, 1998), Chap. 2.Google Scholar