Hardware/Software Partitioning for Heterogenous MPSoC Considering Communication Overhead
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Hardware/software partitioning (HSP) is an important step in the co-design of hardware/software. This paper addresses the problem of HSP with communication (HSPC) on heterogeneous multiprocessor system-on-chip (MPSoC). The classic HSP is modeled as an optimization problem with an objective of minimizing the finishing time in system under the hardware area constraints. First, we put forward an optimal method, integer linear programming (ILP) algorithm, for solving the problem for small inputs. Then, we propose two other algorithms using dynamic programming (DP) method, i.e., Optimal Tree Partitioning (OTP) method for tree-structured graphs and Tree Cover Partitioning (TCP) algorithm for general graphs in polynomial time. The overall performance of the proposed algorithms is evaluated through comparisons with that of a genetic algorithm (GA) and a greedy algorithm which are commonly used to solve HSP problem. We have conducted experimental performance evaluation on various benchmarks with different combinations of computation to communication ratios and hardware area constraints. The experimental results show that OTP algorithm can generate optimal solutions with much faster speed than ILP, and TCP algorithm can obtain near-optimum with higher quality than those produced by GA and greedy algorithm.
KeywordsCommunication Dynamic programming Hardware/software partitioning Heuristic Integer linear programming
We are very grateful for the reviewers and the editors for their comments and suggestions which greatly improved the quality of the manuscript. The research was partially funded by the Key Program of National Natural Science Foundation of China (Grant Nos. 61133005, 61432005), the National Natural Science Foundation of China (Grant Nos. 61370095, 61472124, 61662090, 61602350), the Open Foundation of Hubei Province Key Laboratory of Intelligent Information Processing and Real-time Industrial System (2016znss26C).
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