International Journal of Parallel Programming

, Volume 45, Issue 2, pp 283–299 | Cite as

Data Parallel Algorithmic Skeletons with Accelerator Support

  • Steffen ErnstingEmail author
  • Herbert Kuchen


Hardware accelerators such as GPUs or Intel Xeon Phi comprise hundreds or thousands of cores on a single chip and promise to deliver high performance. They are widely used to boost the performance of highly parallel applications. However, because of their diverging architectures programmers are facing diverging programming paradigms. Programmers also have to deal with low-level concepts of parallel programming that make it a cumbersome task. In order to assist programmers in developing parallel applications Algorithmic Skeletons have been proposed. They encapsulate well-defined, frequently recurring parallel programming patterns, thereby shielding programmers from low-level aspects of parallel programming. The main contribution of this paper is a comparison of two skeleton library implementations, one in C++ and one in Java, in terms of library design and programmability. Besides, on the basis of four benchmark applications we evaluate the performance of the presented implementations on two test systems, a GPU cluster and a Xeon Phi system. The two implementations achieve comparable performance with a slight advantage for the C++ implementation. Xeon Phi performance ranges between CPU and GPU performance.


High-level parallel programming Algorithmic skeletons  GPGPU Hardware accelerators 


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Copyright information

© Springer Science+Business Media New York 2016

Authors and Affiliations

  1. 1.University of MuensterMuensterGermany

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