Architectural Breakdown of End-to-End Latency in a TCP/IP Network
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Adoption of the 10GbE Ethernet standard as a high performance interconnect has been impeded by two important performance-oriented considerations: (1) processing requirements of common protocol stacks and (2) end-to-end latency. The overheads of typical software based protocol stacks on CPU utilization and throughput have been well evaluated in several recent studies. We focus on end-to-end latency and present a detailed characterization across typical server system hardware and software stack components. We demonstrate that application level end-to-end one-way latency with a 10GbE connection can be as low as 10 μs for a single isolated request in a standard Linux network stack. The paper analyzes the components of the latency and discusses possible significant variations to the components under realistic conditions. We found that methods that optimize for throughput can significantly compromise Ethernet based latencies. Methods to pursue reducing the minimum latency and controlling the variations are presented.
KeywordsLatency Network Communication Ethernet
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- 1.Foong, A., Huff, T., Hum, H., Patwardhan, J., Regnier, G.: TCP performance re-visited. In: Proceedings of the IEEE International Symposium on Performance of Systems & Software, Austin, Mar. 2003Google Scholar
- 2.Mogul, J.: TCP offload is a dumb idea whose time has come. In: Proceedings of the 9th Workshop on Hot Topics in Operating Systems (HotOS IX). Usenix Assoc. www.usenix.org/events/hotos03/tech/full_papers/mogul/mogul.pdf (2003)
- 3.Huggahalli, R., et al.: Direct cache access for high bandwidth network I/O. In: International Symposium on Computer Architecture (ISCA) http://www.cs.wisc.edu~isca2005/papers/02A-02.PDF (2005)
- 4.Regnier, G., et. al.: TCP onloading for data center servers. In: IEEE Computer, Nov. 2004Google Scholar
- 8.Feng, W., Balaji, P., Baron, C., Bhuyan, L.N., Panda, D.K.: Performance characterization of a 10-Gigabit Ethernet TOE; high performance interconnects. In: Proceedings of the 13th Symposium, Aug. 2005. http://nowlab.cse.ohio-state.edu/publications/conf-presentations/2005/balaji-hoti05.pdf
- 9.Express Base Specification Revision, P.C.I.: 2.0. http://www.pcisig.com (2006)
- 12.IA-32 Intel® architecture software developer’s manual volume 3: system programming guide appendix A, June 2005Google Scholar
- 13.Foong, A., Fung, J., Newell, D.: An in-depth analysis of the impact of processor affinity on network performance. In: Proceedings of the IEEE International Conference Networks, IEEE Press (2004)Google Scholar
- 16.Hansen, J., Jul, E.: Latency reduction using a polling scheduler. In: Proceedings of the Second Workshop on Cluster-Based Computing, ACM-SIGARCH (2000)Google Scholar