Formal Methods in System Design

, Volume 39, Issue 2, pp 117–143 | Cite as

Exploring structural symmetry automatically in symbolic trajectory evaluation

  • Yongjian Li
  • William N. N. Hung
  • Xiaoyu Song
  • Naiju Zeng
Article

Abstract

This paper presents a formal theory to characterize symmetry in netlists and symmetry in properties. The inherent correlation between the two types of symmetry is formalized as a theorem, which provides the soundness of our symmetry reduction method. A practical tactic is introduced to effectively integrate the symmetry reduction approach in a hybrid verification environment which combines theorem proving and symbolic trajectory evaluation. Finally, the effecitveness of the symmetry reduction method is demonstrated by case studies.

Keywords

Symmetry Symbolic trajectory evaluation Theorem proving 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Aagaard MD, Jones RB, Seger C-JH (1998) Combining theorem proving and trajectory evaluation in an industrial environment. In: DAC ’98: Proceedings of the 35th annual conference on design automation, New York, NY, USA. ACM, New York, pp 538–541 CrossRefGoogle Scholar
  2. 2.
    Adams S, Bjork M, Melham T, Seger C-J (2007) Automatic abstraction in symbolic trajectory evaluation. In: FMCAD ’07: Proceedings of the formal methods in computer aided design, Washington, DC, USA. IEEE Computer Society, New York, pp 127–135 CrossRefGoogle Scholar
  3. 3.
    Brayton R, Hachtel GD, Sangiovanni-Vincentelli A, Somenzi F, Aziz A, Cheng ST, Edwards S (1996) Vis: a system for verification and synthesis. In: CAV ’96: Proceedings of the 8th international conference on computer aided verification. Springer, Berlin, pp 428–432 Google Scholar
  4. 4.
    Clarke EM, Enders R, Filkorn T, Jha S (1996) Exploiting symmetry in temporal logic model checking. Form Methods Syst Des 9(1–2):77–104 CrossRefGoogle Scholar
  5. 5.
    Darbari A (2006) Symmetry reduction for STE model checking using structured models. PhD thesis, University of Oxford Google Scholar
  6. 6.
    Hazelhurst S, Seger C-JH (1995) A simple theorem prover based on symbolic trajectory evaluation and bdd’s. IEEE Trans CAD Integr Circuits Syst 14(4):413–422 CrossRefGoogle Scholar
  7. 7.
    Hung WNN, Aziz A, McMillan K (1997) Heuristic symmetry reduction for invariant verification. In: 6th IEEE/ACM international workshop on logic synthesis, May 1997 Google Scholar
  8. 8.
    Ip CN, Dill DL (1996) Better verification through symmetry. Form Methods Syst Des 9(1–2):41–75 Google Scholar
  9. 9.
    Li Y (2009) Formalization of symbolic trajectory semantics. http://lcs.ios.ac.cn/~lyj238/steSymmetry.html
  10. 10.
    Manku GS, Hojati R, Brayton R (1998) Structural symmetry and model checking. In: Proc intl conf comp-aided verific, pp 159–171 CrossRefGoogle Scholar
  11. 11.
    McMillan KL (2000) A methodology for hardware verification using compositional model checking. Sci Comput Program 37(1–3):279–309 MATHCrossRefGoogle Scholar
  12. 12.
    O’Leary J, Zhao X, Gerth R, Seger C-JH (1999) Formally verifying IEEE compliance of floating-point hardware. Intel Technol J Q1:147–190 Google Scholar
  13. 13.
    Pandey M (1997) Formal verification of memory arrays. PhD thesis, Pittsburgh, PA, USA. Chair-Bryant, Randal E Google Scholar
  14. 14.
    Pandey M, Raimi R, Bryant RE, Abadir MS (1997) Formal verification of content addressable memories using symbolic trajectory evaluation. In: DAC ’97: Proceedings of the 34th annual design automation conference, New York, NY, USA. ACM, New York, pp 167–172 CrossRefGoogle Scholar
  15. 15.
    Paulson LC (1996) ML for the working programmer. Springer, Berlin. University of Cambridge Press, Cambridge MATHGoogle Scholar
  16. 16.
    Seger C-JH, Bryant RE (1995) Formal verification by symbolic evaluation of partially-ordered trajectories. Form Methods Syst Des 6(2):147–189 CrossRefGoogle Scholar
  17. 17.
    Seger C-JH, Jones RB, O’Leary JW, Melham T, Aagaard MD, Barrett C, Syme D (2005) An industrially effective environment for formal hardware verification. IEEE Trans Comput-Aided Des Integr Circuits Syst 24(9):1381–1405 CrossRefGoogle Scholar
  18. 18.
    Sistla AP, Godefroid P (2004) Symmetry and reduced symmetry in model checking. ACM Trans Program Lang Syst 26(4):702–734 CrossRefGoogle Scholar
  19. 19.
    Technical Publications and Training, Intel Corporation (2003) Forte/FL user guide edition Google Scholar
  20. 20.
    Tzoref R, Grumberg O (2006) Automatic refinement and vacuity detection for symbolic trajectory evaluation. In: Ball T, Jones RB (eds) CAV. Lecture notes in computer science, vol 4144. Springer, Berlin, pp 190–204 Google Scholar
  21. 21.
    Yang J, Seger C-JH (2003) Introduction to generalized symbolic trajectory evaluation. IEEE Trans VLSI Syst 11(3):345–353 CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  • Yongjian Li
    • 1
  • William N. N. Hung
    • 2
  • Xiaoyu Song
    • 3
  • Naiju Zeng
    • 1
  1. 1.State Key Lab of Computer ScienceChinese Academy of SciencesBeijingChina
  2. 2.Synopsys Inc.Mountain ViewUSA
  3. 3.Dept. ECEPortland State UniversityPortlandUSA

Personalised recommendations