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Design Automation for Embedded Systems

, Volume 15, Issue 3–4, pp 191–224 | Cite as

FTL algorithms for NAND-type flash memories

  • Se Jin Kwon
  • Arun Ranjitkar
  • Young-Bae Ko
  • Tae-Sun Chung
Article

Abstract

Flash memory is being rapidly deployed as data storage for embedded devices such as PDAs, MP3 players, mobile phones and digital cameras due to its low electronic power, non-volatile storage, high performance, physical stability and portability. The most prominent characteristic of flash memory is that prewritten data can only be dynamically updated via the time consuming erase operation. Furthermore, every block in flash memory has a limited program/erase cycle. In order to manage these issues, the flash memory controller can be integrated with a software module called the flash translation layer (FTL). This paper surveys the state-of-art FTL algorithms. The FTL algorithms can be classified by the complexity of the algorithms: basic and advance. Furthermore, they can be classified by their corresponding tasks: performance enhancement and durability enhancement. The FTL algorithms corresponding to each classification are further broken down into various schemes depending on the methods they adopt. This paper also provides the information of hardware features of flash memory for FTL programmers.

Keywords

NAND flash memory Embedded system FTL 

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Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  • Se Jin Kwon
    • 1
  • Arun Ranjitkar
    • 2
  • Young-Bae Ko
    • 3
  • Tae-Sun Chung
    • 3
  1. 1.Computer EngineeringAjou UniversitySuwonSouth Korea
  2. 2.Information & CommunicationAjou UniversitySuwonSouth Korea
  3. 3.Information & Computer EngineeringAjou UniversitySuwonSouth Korea

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