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Unrestricted vs restricted cut in a tableau method for Boolean circuits

  • Matti JärvisaloEmail author
  • Tommi Junttila
  • Ilkka Niemelä
Article

Abstract

This paper studies the relative efficiency of variations of a tableau method for Boolean circuit satisfiability checking. The considered method is a nonclausal generalisation of the Davis–Putnam–Logemann–Loveland (DPLL) procedure to Boolean circuits. The variations are obtained by restricting the use of the cut (splitting) rule in several natural ways. It is shown that the more restricted variations cannot polynomially simulate the less restricted ones. For each pair of methods T, T′, an infinite family \(\{\mathcal{C}_{n}\}\) of circuits is devised for which T has polynomial size proofs while in T′ the minimal proofs are of exponential size w.r.t. n, implying exponential separation of T and T′ w.r.t. n. The results also apply to DPLL for formulas in conjunctive normal form obtained from Boolean circuits by using Tseitin’s translation. Thus DPLL with the considered cut restrictions, such as allowing splitting only on the variables corresponding to the input gates, cannot polynomially simulate DPLL with unrestricted splitting.

Keywords

satisfiability Boolean circuits cut rule proof complexity DPLL 

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Copyright information

© Springer 2005

Authors and Affiliations

  • Matti Järvisalo
    • 1
    Email author
  • Tommi Junttila
    • 1
  • Ilkka Niemelä
    • 1
  1. 1.Helsinki University of TechnologyLaboratory for Theoretical Computer ScienceFinland

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