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Analog Integrated Circuits and Signal Processing

, Volume 101, Issue 2, pp 175–185 | Cite as

A 230 μW built-in on-chip auto-calibrating RF amplitude detector in 65 nm CMOS

  • Yonatan Kifle
  • Mohammad AlhawariEmail author
  • Sleiman Bou-Sleiman
  • Hani Saleh
  • Baker Mohammad
  • Mohammed Ismail
Article
  • 65 Downloads

Abstract

In this paper, a built-in-self-calibration RF amplitude detector circuit in 65 nm CMOS is presented. The proposed architecture makes use of two detector replicas with a feedback control system to perform the self-calibration. The system is capable of detecting RF peak amplitudes range of 0–0.6 Vp with a conversion gain of − 3 V/V. The proposed system has a wide dynamic range that can auto-corrects the RF detector to less than 10% across process and temperature variations. This architecture is implemented in standard 65 nm 1P7 M CMOS process. Comprehensive silicon measurement results show that the self-calibration structure improves the detection error of the non-calibrated RF amplitude detector by a maximum of 71% at only 230 μW overall power consumption. The proposed system can be used to calibrate the variations in circuits within an RF transceiver such as LNA, Mixers, oscillators etc.

Keywords

Amplitude detector Built-in-self-test (BiST) Detection error RF detector and variability compensation 

Notes

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Copyright information

© Springer Science+Business Media, LLC, part of Springer Nature 2019

Authors and Affiliations

  1. 1.Khalifa Semiconductor Research Center (KSRC)Khalifa University of Science and TechnologyAbu DhabiUAE
  2. 2.Linköping UniversityLinköpingSweden
  3. 3.Wayne Center for Integrated Circuits and Systems (WINCAS)Wayne State UniversityDetroitUSA
  4. 4.Abu DhabiUAE
  5. 5.Intel CorporationPhoenixUSA

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