Layout optimization of planar inductors for high-efficiency integrated power converters
The performance of dc–dc power converters is critically dependent on the inductors at their core. Planar spiral inductors are compact constructions that can be scaled and integrated without the limitations of traditional wire-wound devices. Therefore, they are increasingly employed to meet the needs of modern low-power applications, especially where size, weight and manufacturing costs are deciding factors. As a planar inductor is designed to fit the parameters of an application, it is paramount to take into account the associated parasitic effects that have an impact on the converter performance. This paper analyzes how the conversion efficiency of boost and buck integrated power converters depends on the parasitics elements of planar inductors, and how it can be improved by optimizing the inductor layout. In particular, the paper provides the guidelines for maximizing the time constant of the inductor by considering the different geometrical features that define the inductor shape. The trade-offs that maximize the inductance time constant for different shapes are introduced, and an algorithm is developed to optimize the performance with no area overhead. Finally, three boost converters are designed, simulated, and compared in a 65-nm CMOS technology to demonstrate the validity of the proposed approach, and the corresponding conversion efficiency improvement is assessed.
KeywordsIntegrated inductor Spiral inductor Air-core inductor Inductance time constant Layout synthesis DC–DC converter Boost converter Buck converter
Funding was provided by the Natural Sciences and Engineering Research Council of Canada (Grant No. RGPIN-2017-06305).
- 12.Shaltout, A. H., Lipski, M., & Gregori, S. (2018). Efficiency model of fully-integrated boost dc–dc converters. In Proceedings of the IEEE international symposium on circuits and systems (ISCAS) (pp. 1–5).Google Scholar
- 17.Niknejad, A. M., & Meyer, R. G. (2000). Design, simulations, and applications of inductors and transformers for Si RF ICs. Norwell, MA: Kluwer.Google Scholar
- 21.Bechir, M. H., Yaya, D. D., Kahlouche, F., Soultan, M., Youssouf, K., Capraro, S., et al. (2016). Planar inductor equivalent circuit model taking into account magnetic permeability, loss tangent, skin and proximity effects versus frequency. Analog Integrated Circuits and Signal Processing, 88(1), 105–113.CrossRefGoogle Scholar
- 22.Crols, J., Kinget, P., Craninckx, J., & Steyaert, M. (1996). An analytical model of planar inductors on lowly doped silicon substrates for high frequency analog design up to 3 GHz. In Digest of technical papers of the symposium VLSI circuits (VLSI) (pp. 28–29).Google Scholar
- 25.Wheeler, H. A. (1928). Simple inductance formulas for radio coils. Proceedings of the Institute of Radio Engineers, 16(10), 1398–1400.Google Scholar
- 27.del Mar Hershenson, M., Mohan, S. S., Boyd, S. P., & Lee, T. H. (1999). Optimization of inductor circuits via geometric programming. In Proceedings of the design automation conference (DAC) (pp. 994–998).Google Scholar
- 28.Shaltout, A. H., & Gregori, S. (2016). Conformal-mapping model for estimating the resistance of polygonal inductors. In Proceedings of the IEEE international symposium on circuits and systems (ISCAS) (pp. 1274–1277).Google Scholar
- 30.Shaltout, A. H., & Gregori, S. (2017). Design trade-offs of integrated polygonal inductors for dc–dc power converters. In Proceedings of the IEEE international symposium on circuits and systems (ISCAS) (pp. 1–4).Google Scholar