# Analysis of switched-capacitor circuits using driving-point signal-flow graphs

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## Abstract

This paper extends the driving-point signal-flow graphs to switched-capacitor (SC) circuits by introducing a new theoretical element: an auxiliary voltage source that transfers no charge. In contrast to existing SFG methods, our method has no restrictions as to what types of SC circuits can be analysed, it requires no equivalent circuits or tables, and it works with two-phase as well as multi-phase SC circuits of any complexity. Compared to charge-equation matrix methods, it requires more effort, but is better suited for hand analysis because it makes causal relationships visible. Three illustrative examples are given to show the efficiency of the method and present a few application hints: a voltage doubler, the standard SC integrator, and a four-phase circuit simulating an inductor.

## Keywords

Switched-capacitor circuits Signal-flow graph Driving-point impedance Multi-phase SC networks Circuit analysis## 1 Introduction

Switched-capacitor (SC) circuits are analog discrete-time circuits that consist of switches, capacitors, and amplifiers. They are as diverse and powerful as they are hard to analyse. This is mainly so because SC circuits *reconfigure* between phases, so they will not have the same topology, nor even the same number of nodes, in the different phases.

Signal-flow graphs (SFGs) are often used for hand analysis of circuits (and for teaching), because they make causal relationships visible and provide insight into a circuit even before transfer functions are calculated [1, 2, 3, 4]. While the SFG analysis of arbitrary continuous-time circuits is solved, there is no SFG method yet that can be applied to all SC circuits without restrictions on their structure or number of phases. In this paper we propose such an SFG method, compare it to previous SFG method to highlight the improvement, and compare it to the established charge-equation method to show that it describes the same equation systems in a different way.

The DPSFG was introduced in 1998 [5] when Ochoa combined driving-point impedance techniques with Mason signal-flow graphs (SFGs) [6, 7]. Ochoa used auxiliary voltage generators (which we call auxiliary voltage sources or *aux sources*) and explained the SFG derivation by first splitting schematics into sub-circuits and then coupling the sub-circuits with voltage-controlled current sources.

We cast Ochoa’s method into a different cognitive framework in [8], making it unnecessary to resort to intermediate circuit representations and simplifying the application of the method to the point where no written material or tables at all are required to use it. This way of explaining the method followed closely Mason’s original idea to use SFGs because they “offer a visual structure, a universal graph language, a common ground upon which causal relationships among a number of variables may be laid out and compared [7]”. The one-to-one correspondence between circuit and graph also made it straightforward to derive transposed circuits, as shown in [8].

Concerning SC networks, two groups devised and published general analysis methods in parallel. The first publication used the concepts of nodal analysis on SC circuits and also extended classical two-port theory to SC circuits [9]. In the second publication, the derivation of the matrices is simpler, because it uses a switch matrix that is straightforward to derive, but since the author does not use the *z* transform, but only discrete-time equations with time indices, the derivations do not result in *z* transfer functions [10].

The nodal analysis was then further simplified by using the indefinite admittance matrix (IAM) in [11] and was extended to the analysis of multiphase SC networks [12]. Since there is a very close correspondence between signal-flow graphs and IAMs, SFGs started to be used at that point in time because, by making causal relationships and signal flow visible, authors gained more insight into the circuits.

The first comprehensive paper about SFG analysis of SC circuits was published in 1984 [13], it bases on the theory introduced in [11] and makes it possible to easily assemble signal-flow graphs of SC filters by first tabulating basic building blocks and the corresponding graph parts. This method was extended to multiphase SC networks [14].

Both [13] and [14] succeed in making the signal flow visible, but the graphs are not one-to-one maps of the circuits. Furthermore, the methods only work for source-sink-node (SSN) networks [14], which means that all nodes are either at a voltage source or at an amplifier input. Many circuits, e.g., those doing correlated double sampling and voltage multiplication, are therefore not covered.

These methods assume from the start that there are no parasitic capacitors and that the gain of the op-amps used in the SC circuits is infinite. They cannot possibly analyse the effect of finite opamp gain on the transfer functions, which is quite important, as was, e.g., discussed in [15] for SC integrators.

This was remedied in Chichocki et al. [16] who made it possible to analyse *any* SC circuit, with non-ideal op-amps and also parasitic capacitors. They used a small number of equivalent *z*-domain circuits and the Coates flow-graph technique. In their own words, they “require a smaller number of elements than the equivalent circuits previously proposed”. But they still require equivalent circuits containing some additional elements.

In a previous paper we applied DPSFGs to the noise analysis in SC circuits, [17]. In this paper, we introduce a DPSFG analysis method for SC circuits that requires no equivalent circuits whatsoever and imposes no restrictions on amplifier gains, parasitic capacitors, or the number of clock phases. What results is a general method for visual-based (i.e., intuitive) analysis of switched-capacitor networks of any complexity, with any number of phases.

As in all cited papers, the theory is simple (here it is the introduction of a new type of auxiliary voltage source). We want to show that this one intuitive understanding—the understanding of that new aux source—makes it possible to analyse continuous-time and switched-capacitor circuits with the same SFG technique. The purpose of this paper is to extend and unify SFG analysis and enable SFG users to tackle all SC circuits as easily as they can treat continuous-time circuits.

Therefore, we proceed as follow: In Sect. 2, we give a short introduction to SFGs and DPSFGs of continuous-time circuits. Our explanation complements [4, 5, 8]; it is structured such that the introduction of the new theoretical element is as simple as possible in Sect. 3, where we also give a minimal example. Section 4 contains the main example in which we show how to efficiently apply our method. Section 5 extends this to multi-phase networks and shows how to calculate a discrete-time input impedance. Finally, in Sect. 6 we show what to do when graphical evaluation becomes too complicated.

## 2 Driving-point signal-flow graphs (DPSFG) of continuous-time circuits

This section presents the DPSFG method introduced in [5], brought to its present form in [8], and provided as a sequence of video tutorials in [4].

### 2.1 Signal-flow graphs and Mason’s gain rule

*branches*are multipliers, and the so-called

*nodes*are variables. All branches going into a node are added. Therefore, each node that has branches going into it describes a linear equation, and the example shown in Fig. 1 represents the following linear equation system:

It would be equally simple to take any matrix equation, e.g., an IAM representation of a circuit, and draw it as a Mason graph, but that would not necessarily be helpful as it would then not show the causal relationships.

*u*to a node

*z*can be calculated as

*N*loops, but most feedback systems derive their special properties from interacting loops, so the sum often ends soon in practice. In more technical terms, whenever a matrix representation of the equation system would be sparse, then Mason’s formula is efficient.

*u*to

*z*. The \(\Delta _i\) are their respective sub-determinants, which are calculated just like \(\Delta\), but only using loops that have no nodes in common with the forward path in question.

Mathematically, an SFG is just a graphical representation of an equation system, which can even be manipulated and simplified graphically [6]. But as Mason stated there, it can also be used to visualise causal relationships—if it is drawn in the right way.

### 2.2 The driving-point signal-flow graph (DPSFG)

The most important aspect of a signal-flow graph that is to be used for hand analysis is that it maintains and represents causal relationships. The common tool used in literature is source superposition, as it is also done when circuit equations are derived from circuits.

Source superposition will give individual contributions from all sources to all circuit nodes for the condition that all other sources are set to zero. So unless there is a voltage source in every node of a circuit, it is necessary to tabulate all possible networks that could reasonably appear between sources and sinks, which invariably means restricting methods to certain classes of circuits, or to use another analysis method to derive the individual contributions.

As explained in [8], the DPSFG method solves this problem by making sure there is a voltage source at *every* circuit node. In order to achieve this, the first step in circuit analysis is to introduce an auxiliary source (aux source) at every node that does not yet have a voltage source. This aux source is defined as follows: *It produces the voltage that is already present at a node, and therefore conducts no current.*

*G*and a capacitor having capacitance

*C*, and an opamp having gain

*A*. Node 1 is connected to the input source, node 3 to the opamp output, which is also a voltage source, but there is no voltage source on node 2. Therefore an aux source is connected to node 2, resulting in Fig. 2(b).

Then we simply do source superposition, voltage by voltage. \(V_{\mathrm {in}}\) controls \(V_1\), and we have Fig. 3(b). \(V_1\) lets a current \(I_2=G\,V_1\) flow, which gives Fig. 3(c). \(V_2\) controls the opamp output as \(V_3=-A\,V_2\), giving Fig. 3(d). \(V_3\) lets a current \(I_2=sC\,V_3\) flow, and it also is the same as \(V_{\mathrm {out}}\), and we have Fig. 3(e).

This is almost all, but now we have a problem: \(I_2\) is not zero! The aux source was defined to conduct no current. However, \(I_2\) is not the true current into the source, but the current flowing *into* the aux source for \(V_2=0\): the short-circuit current of the aux source. So one part of the source superposition is missing. In order to have zero current under superposition, we now need to calculate the necessary voltage \(V_2=Z_2\,I_2\) to have \(I_2\) flow *out of* the aux source when all other sources are set to zero. This is Fig. 3(f).

*every*node now has a voltage source attached, all of which are set to zero during superposition, this DPI is always the inverse of the sum of all conductances connected to the node. Here,

And this method always works, for every linear circuit. The only thing that happens for larger circuits is that there are more aux sources, and of course Mason’s rule becomes more tedious to evaluate, but the derivation of the branches is never different from, or more difficult than, what we just showed. Note, however, that from a didactic point of view, it can be better to fill in the DPSFG in a different order (c.f. [4, Chap. 7]).

*G*and

*sC*:

In summary, the connection of an aux source causes the KCL equation for that node to appear in the graph. This is basically why the DPSFG method must work for any linear circuit.

## 3 The charge-mode auxiliary source

At this point we are ready to extend the method to SC circuits. After the lengthy introduction it is clear that (a) SC circuits reconfigure when the phases change, and (b) if the proper auxiliary source is chosen, then source superposition becomes simple and drawing an SFG becomes straightforward.

### **Theorem 1**

*The DPSFG method as introduced in* [5], *and as presented without the need to split a circuit into sub-circuits in Sect.* 2, *works for all SC circuits with an arbitrary number of phases if (a) one circuit diagram per phase is drawn, with switches shorted or opened, and (b) in each of those circuit diagrams, auxiliary sources are attached to all nodes that are not connected to a voltage source. Such an aux source is defined as follows: It produces the voltage that is already present at a node, and therefore* * conducts no charge*.

*not*a source-sink network. The figure shows the circuit with the switches, and the two circuit configurations in the odd phase (phase 1) and the even phase (phase 2). We have given all nodes individual numbers.

Node 1 in the odd phase is at a voltage source terminal, but nodes 2 and 3 in the even phase are not, so there we attach aux sources. This time the sources have a voltage \(V_{2,3}^{\mathrm {e}}\) and a charge \(Q_{2,3}^{\mathrm {e}}\) that is the charge flowing into the source while the even-phase circuit settles to its final state.

Now we can construct the DPSFG just as in Sect. 2.2 but by using charges and voltages instead of currents and voltages. First we write down all nodes of the SFG, in two rows for the two phases, giving Fig. 5(a). Now source by source: \(V_{\mathrm {in}}^{\mathrm {o}}\) is \(V_1^{\mathrm {o}}\): Fig. 5(b). If all sources other than \(V_1^{\mathrm {o}}\) are set to zero, then \(C_1\) and \(C_2\) are discharged into the aux sources \(V_{2}^{\mathrm {e}}\) and \(V_{3}^{\mathrm {e}}\).

*driving-point elastances*, an elastance being an inverse capacitance (\(\hbox {unit F}^{-1}\)), and obviously

## 4 Main example: the SC integrator

In the previous section we just numbered all nodes, but now we introduce a technique that makes the node numbers in all phases unique: the nodes are numbered with powers of 2, i.e., \(1,2,4,8,16,\ldots\), in the schematic with switches, Fig. 6 (top). During the derivation of the odd and even schematics in Fig. 6, nodes of the original circuit are connected by closed switches, and the number of such a new node is the sum of the numbers of the nodes connected.

Since the original numbers were powers of 2, the new nodes are guaranteed to have unique numbers and contain local topological information, with the effect that all elastances \(S_i^{\phi }\) with the same *i* are the same, irrespective of their phase \(\phi\).

### 4.1 Calculation with charge equations

*A*works in both phases, giving two equations:

*one*delay from an odd phase to the next odd phase (see “Appendix”), this is the well-known transfer function of the SC integrator (e.g., [15]).

### 4.2 Calculation with a driving-point signal-flow graph

**First,**auxiliary sources have to be attached to all circuit nodes that do not already have voltage sources on them. These are the nodes 4 and 6 in Fig. 7.

**Second,**a signal-flow graph can be prepared, as shown in Fig. 8(a). This graph contains the input and output paths, the amplifying paths, and, in every node where there is an aux source, also an aux-source charge and an elastance path. The elastances are:

**Third,** all paths due to all voltage sources can be drawn, leading from Fig. 8(a, b). We will just explain two of these paths. First, let all voltage sources be zero, and then let \(V_8^{\mathrm {o}}\) be switched to its value. Then the charge \(C_2 V_8^{\mathrm {o}}\) will flow into the aux source at node 4, giving a contribution to \(Q_4^{\mathrm {o}}\). This is the path with weight \(C_2\) from \(V_8^{\mathrm {o}}\) to \(Q_4^{\mathrm {o}}\).

However, this is not the only effect \(V_8^{\mathrm {o}}\) will have, because in this step of calculating source superposition, all other voltages are zero, particularly all voltages in the even phase. The capacitor \(C_2\) has now been charged to \(-C_2 V_8^{\mathrm {o}}\) in the odd phase (observe the \(+\) sign on the left plate of \(C_2\) to understand why the charge is negative), and in the even phase it is completely discharged because the voltage is zero on both sides. Therefore the charge \(-C_2 V_8^{\mathrm {o}}\) flows into the aux source at node 6. Since this is after a phase change, we get a path \(-z^{-1}C_2\) from \(V_8^{\mathrm {o}}\) to \(Q_6^{\mathrm {e}}\).

All other missing paths can then be found by applying the same method to \(V_3^{\mathrm {o}}\), \(V_4^{\mathrm {o}}\), \(V_6^{\mathrm {e}}\), and \(V_8^{\mathrm {e}}\), and then the DPSFG is complete.

**Finally,**it would already be possible to apply Mason’s gain rule, and if our only goal were to get a transfer function as quickly as possible, then we would stop here. However, using one of the graphical simplification methods mentioned in Sect. 2, Fig. 8(b) can readily be re-drawn as Fig. 9. Then a term \(C_2(A+1)\) appears, and it becomes visible in the graph already that \(C_2\) is subject to the Miller effect.

As before, calculating the effects of parasitic capacitors would be simple with this method as they would only change the elastance equations (42).

### 4.3 Comparison of the two methods

This DPSFG method gives a direct, graphical way to draw a graph from a circuit and solve it using Mason’s gain rule. What remains to be shown now is how the two methods relate.

In the classical method, we wrote down charge conservation equations at all nodes where there were no voltage sources. In the DPSFG method, we introduced aux sources to all nodes where there were no voltage sources. So it stands to reason that the SFG branches pertaining to the aux-source nodes should be charge conservation equations, just as they were KCL equations in the continuous-time case.

In summary, the connection of an aux source causes the charge conservation equation for this node to appear in the graph. This is why the method will work for any SC circuit operating with voltage settling and charge transfer.

## 5 Second example: multi-phase SC networks and discrete-time input impedance

*any*switched-capacitor circuit that works with settling and charge transfer. We will now demonstrate this using the simulated inductor in Fig. 10. This circuit does not only have four phases, but it requires the calculation of the input charge difference \(\Delta Q_{\mathrm {in}}\) that the input source \(V_{\mathrm {in}}\) has to provide.

## 6 When Mason is too difficult...

The example in the previous section resulted in a very complicated and tedious evaluation of Mason’s gain rule. Clearly, this example is at the border of what is reasonably calculatable by hand.

Note, however, that this only concerns Mason’s rule. We can still use the DPSFG method to obtain a correct graph that corresponds to the circuit diagram (which makes it easily reviewable), but then use a computer algebra tool (Mathematica, Python/NumPy/SciPy,...) to actually evaluate the equation system.

Such a computation entails listing the dependent variables, listing all equations (one per node), and then solving the equations and substituting the elastances.

This can easily be done for the graph in Fig. 12, but we will show the script for the graph in Fig. 9 such that it is more instructive to the reader. In Mathematica^{1} notation, this would be:

A brief explanation: In Mathematica, = is an assignment, == an equality, -> a substitution rule, and the operator /. performs substitutions. The solution sols consists of one substitution rule for every dependent variable. Therefore, the last line calculates the transfer function voo/vio, substitutes the solution for voo and then the elastances elast, takes the \(\lim _{A\rightarrow \infty }\;\), and finally simplifies. The result of this code is:

This is evidently the same as (41).

## 7 Conclusions

In this paper, we have adapted the driving-point signal-flow graphs (SFGs) to switched-capacitor circuits by one main modification: we have exchanged the zero-current auxiliary source by a zero-charge aux source. This let the driving-point impedances become driving-point elastances.

We have demonstrated the application of the method by examples, in which we also showed a few tricks helping simplify the analysis even further, and have shown by argument that this method is applicable to any SC circuit relying on charge transfer just as the original method is applicable to any linear continuous-time circuit.

Therefore, we have unified the SFG analysis methodology for continuous-time and SC circuits. Our method only requires that the users remember Mason’s gain rule and understand source superposition and the aux source. Written material like tables of partial transfer functions, equivalent circuits, etc., are unnecessary. In this respect our method is unique among graph-based SC analysis methods.

Of course, the same analysis can be done by deriving and solving charge equations, which would give the same symbolic results with fewer steps and more quickly using a computer algebra tool. The graph method, however, maintains causal relationships and makes them visible, and when studying and comparing different SC structures, this insight is often worth the additional effort.

While the last example gave a very complicated graph determinant and is at the limit of what can be done by hand (in fact, we, the authors, evaluated Mason’s rule using Mathematica to be sure we do not make stupid mistakes), the one-to-one correspondence makes it straightforward to review a drawn SFG versus its circuit. It is uncommon with this method that an equation is omitted, and near impossible to introduce redundant equations, which is something that everyone who has analyzed circuits by hand using equations knows all too well.

Using Mason’s gain rule to derive transfer functions can give more insight into a circuit, but if evaluating Mason’s rule becomes too complicated, then calculating transfer functions from a signal-flow graph can also be done directly by entering the euqations into a computer algebra tool.

## Footnotes

- 1.
Note that at the time we write this paper, Mathematica is available on the cheap Raspberry Pi computers for free, and calculations such as the ones described here do not take much computation time even on such a comparatively slow computer.

## References

- 1.Wanhammar, L. (2009).
*Analog filters using MATLAB*. Berlin: Springer.CrossRefzbMATHGoogle Scholar - 2.Chan Carusone, T., Johns, D., & Martin, K. (2011).
*Analog integrated circuit design*(2nd ed.). Hoboken: Wiley.Google Scholar - 3.Ndjountche, T. (2016).
*CMOS analog integrated circuits: high-speed and power-efficient design*. Boca Raton: CRC Press.Google Scholar - 4.Schmid, H. (2016). Signal-flow graphs in 12 short lessons. HT FHNW EIT: Analog and mixed-signal circuits and signal processing (video channel). FHNW. Retrieved February 28, 2018 from https://tube.switch.ch/channels/d206c96c.
- 5.Ochoa, A. (1998). A systematic approach to the analysis of general and feedback circuits and systems using signal flow graphs and driving-point impedance.
*IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing*,*45*(2), 187–195.CrossRefGoogle Scholar - 6.Mason, S. J. (1953). Feedback theory: Some properties of signal flow graphs.
*Proceedings of the IRE*,*41*(9), 1144–1156.CrossRefGoogle Scholar - 7.Mason, S. J. (1956). Feedback theory: Further properties of signal flow graphs.
*Proceedings of the IRE*,*44*(7), 920–926.CrossRefGoogle Scholar - 8.Schmid, H. (2002). Circuit transposition using signal-flow graphs.
*Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS)*,*2*, 25–28.Google Scholar - 9.Kurth, C., & Moschytz, G. (1979). Nodal analysis of switched-capacitor networks.
*IEEE Transactions on Circuits and Systems*,*26*(2), 93–105.CrossRefzbMATHGoogle Scholar - 10.Tsividis, Y. (1979). Analysis of switched capacitive networks.
*IEEE Transactions on Circuits and Systems*,*26*(11), 935–947.CrossRefzbMATHGoogle Scholar - 11.Hökenek, E., & Moschytz, G. S. (1980). Analysis of general switched-capacitor networks using indefinite admittance matrix.
*IEE Proceedings G - Electronic Circuits and System*,*127*(1), 21–33.MathSciNetCrossRefGoogle Scholar - 12.Hökenek, E., & Moschytz, G. S. (1980). Analysis of multiphase switched-capacitor (msc) networks using the indefinite admittance matrix (iqm).
*IEE Proceedings G - Electronic Circuits and System*,*127*(5), 226–241.CrossRefGoogle Scholar - 13.Moschytz, G. S., & Brugger, U. W. (1984). Signal-flow graph analysis of SC networks.
*IEE Proceedings G - Electronic Circuits and System*,*131*(2), 72–85.CrossRefGoogle Scholar - 14.Dabrowski, A., & Moschytz, G. S. (1990). Direct analysis of multiphase switched-capacitor networks using signal-flow graphs.
*IEEE Transactions on Circuits and Systems*,*37*(5), 594–607.MathSciNetCrossRefGoogle Scholar - 15.Ki, W. H., & Temes, G. C. (1990). Offset-compensated switched-capacitor integrators.
*Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS)*,*4*, 2829–2832.CrossRefGoogle Scholar - 16.Cichocki, A., & Unbehauen, R. (1987). Simplified analysis of arbitrary switched-capacitor networks.
*IEE Proceedings G - Electronic Circuits and System*,*134*(1), 45–53.CrossRefGoogle Scholar - 17.Schmid, H., Eichelberger, L., & Huber, A. (2016). A tutorial to switched-capacitor noise analysis by hand.
*Analog Integrated Circuits and Signal Processing*,*89*(1), 249.CrossRefGoogle Scholar

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