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Analog Integrated Circuits and Signal Processing

, Volume 92, Issue 3, pp 343–353 | Cite as

A 0.18\(\upmu\)m CMOS voltage multiplier arrangement for RF energy harvesting

  • Shailesh Singh ChouhanEmail author
  • Kari Halonen
Article

Abstract

This work presents a two-stage voltage multiplier (VM) useful in RF energy harvesting based applications. The proposed circuit is based on the conventional differential drive rectifier, in which the input RF signal has been level shifted using a simple arrangement. This signal is then used to drive the next stage, which has been formed by using gate cross-coupled transistors. As a result, the load driving capability of the proposed architecture increases. The load in this work has been emulated in terms of a parallel RC circuit. The architecture has been implemented using standard 0.18 \(\mu\)m CMOS technology. The measurements of the two-stage conventional VM (CVM) and proposed VM circuits were performed at ISM frequencies 13.56, 433, 915 MHz and 2.4 GHz for R\(_L\) of values 1, 5, 10, 3 and 100 K\(\Omega\) with a fixed value of C\(_L\) equal to 20 pF. The performance evaluation has been done in terms of the power conversion efficiency (PCE) and average output DC voltage. The measured results show an improvement in PCE of 5% (minimum) for 13.56, 433 and 915 MHz frequencies, and up to 2% improvement for a frequency value of 2.4 GHz at the targeted load condition of 5 K\(\Omega ||\)20 pF, when compared with the measured results of the CVM circuit.

Keywords

Energy harvesting Rectifiers ISM frequencies RF to DC converter Voltage multiplier 

Notes

Acknowledgements

This work is funded by the TEKES Project Dnro 3246/31/2014 of the Tekes—the Finnish Funding Agency for Innovation.

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Copyright information

© Springer Science+Business Media, LLC 2017

Authors and Affiliations

  1. 1.Department of Micro-and Nano sciences, School of Electrical EngineeringAalto UniversityEspooFinland

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