Design-to-testing: a low-power, 1.25 GHz, single-bit single-loop continuous-time \(\Delta \Sigma\) modulator with 15 MHz bandwidth and 60 dB dynamic range

  • Sakkarapani Balagopal
  • Kehan Zhu
  • Xinyu Wu
  • Vishal Saxena


Continuous-time Delta-Sigma (CT-\(\Delta \Sigma\)) analog-to-digital converters have been extensively investigated for their use in wireless receivers to achieve conversion bandwidths >15 MHz and higher resolution of 10–14 bits. This paper presents the complete design-to-testing tutorial of a state-of-the-art high-speed single-bit CT-\(\Delta \Sigma\) architecture and its circuit design details in 0.13 μm CMOS technology node sampling at 1.25 GS/s. The designed modulator achieves higher dynamic range of 60 dB in a wide conversion bandwidth of 15 MHz and consumes only 3.5 mW. The proposed modulator achieves a Figure of Merit of 154 fJ/level.


Analog-to-digital converter Continuous-time \(\Delta \Sigma\) Digital-to-analog converter Low-power single-bit \(\Delta \Sigma\) Tutorial on \(\Delta \Sigma\) Testing \(\Delta \Sigma\) Board design \(\Delta \Sigma\) 


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Copyright information

© Springer Science+Business Media New York 2016

Authors and Affiliations

  • Sakkarapani Balagopal
    • 1
  • Kehan Zhu
    • 1
  • Xinyu Wu
    • 1
  • Vishal Saxena
    • 1
  1. 1.Boise state universityBoiseUSA

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