Effect of comparator offset on the linearity of charge sharing ADCs
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The charge-sharing (CS) switching scheme appeared recently as an alternative to the charge-redistribution (CR) ADC for moderate-resolution low-power applications. One advantage of the CS is that it requires less demanding reference and input buffers. On the other hand, the CS ADC is very sensitive to the comparator offset, because the latter is translated into non-linearity on the ADC transfer curve. This paper examines the mechanism that causes this non-linearity and proposes a closed-form expression for the maximum effective resolution that a CS ADC may achieve in the presence of comparator offset. Finally, the model is verified with behavioral simulations.
KeywordsSAR ADC Charge-sharing Low-voltage Comparator offset DNL INL ENOB
The authors thank Fabio Rabuske for the valuable discussions and for reviewing the mathematics. This work has been supported by FCT, Fundação para a Ciência e a Tecnologia (Portugal), under Projects PEst-OE/EEI/LA0021/2013 and DISRUPTIVE (EXCL/EEI-ELC/0261/2012); and CNPq, Conselho Nacional de Desenvolvimento Científico e Tecnológico (Brazil), Ph.D. Grant 201887/2011-8.
- 1.Craninckx, J., & van der Plas, G. (2007). A 65fJ/conversion-step 0- to-50MS/s 0-to-0.7mW 9b charge-sharing SAR ADC in 90nm digital CMOS. In IEEE ISSCC digest of technical papers (pp. 246–247).Google Scholar
- 3.Rabuske, T. & Fernandes, J. (2015). A 9-b 0.4-V charge-mode SAR ADC with 1.6-V input swing and a MOSCAP-only DAC. In Proceedings of the ESSCIRC (pp. 311–314).Google Scholar