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OTA-C based high-speed analog processing for real-time fault location in electrical power networks

  • François GaugazEmail author
  • François Krummenacher
  • Maher Kayal
Article

Abstract

This paper explores the potential and limitations of analog integrated circuit techniques for the simulation of low-loss or lossless 1D or 2D transmission mediums. In this approach, a transmission line is mapped into a ladder consisting of N identical LC elements, each modeling a finite length increment of the line. Inductors are then emulated by a gyrator-capacitor combination, yielding a classical transconductor-capacitor (gm-C) circuit, suitable for integration. The validity of this approximation is discussed in the context of fault location in power networks, an application based on the electromagnetic time-reversal method. Design constraints on gm-C circuits are derived and non-ideal effects such as finite open-loop gain and component mismatches are evaluated. It is shown that a simple analog implementation can locate the fault within 1 % accuracy with a significant speed advantage over classical computational methods, reducing the processing time to <100 ms.

Keywords

Analog emulation Transmission lines Power network fault location Electromagnetic time-reversal 

Notes

Acknowledgments

This research has been funded by the Swiss National Science Foundation (SNSF), within the Project N: 146414.

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Copyright information

© Springer Science+Business Media New York 2016

Authors and Affiliations

  • François Gaugaz
    • 1
    Email author
  • François Krummenacher
    • 1
  • Maher Kayal
    • 1
  1. 1.Electronics LaboratoryÉcole Polytechnique Fédérale de LausanneLausanneSwitzerland

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