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A 1.1 V 6.2 mW, wideband RF front-end for 0 dBm blocker tolerant receivers in 90 nm CMOS

  • Naveed Ahsan
  • Christer Svensson
  • Rashad Ramzan
  • Jerzy Dabrowski
  • Aziz Ouacha
  • Carl Samuelsson
Article
  • 271 Downloads

Abstract

This paper presents the design and implementation of a low power, highly linear, wideband RF front-end in 90 nm CMOS. The architecture consists of an inverter-like common gate low noise amplifier followed by a passive ring mixer. The proposed architecture achieves a high linearity in a wide band (0.5–6 GHz) at very low power. Therefore, it is a suitable choice for software defined radio (SDR) receivers. The chip measurement results indicate that the inverter-like common gate input stage has a broadband input match achieving S11 below −8.8 dB up to 6 GHz. The measured single sideband noise figure at an LO frequency of 3 GHz and an IF of 10 MHz is 6.25 dB. The front-end achieves a voltage conversion gain of 4.5 dB at 1 GHz with 3 dB bandwidth of more than 6 GHz. The measured input referred 1 dB compression point is +1.5 dBm while the IIP3 is +11.73 dBm and the IIP2 is +26.23 dBm respectively at an LO frequency of 2 GHz. The RF front-end consumes 6.2 mW from a 1.1 V supply with an active chip area of 0.0856 mm2.

Keywords

Blocker suppression Common gate (CG) Highly linear Low power Low IF receiver Software defined radio Wideband front-end 

Notes

Acknowledgments

The authors would like to thank Johan Brobäck at Rohde & Schwarz, Sweden and Ronny Peschel at Agilent for providing the test equipment. Special thanks are due to Stig Leijon at FOI, Sweden, for chip wire bonding.

References

  1. 1.
    Yoshimoto, S., Yamamoto, Y., Takahashi, Y., & Otsuka, E. (2002). Multi-band RF SAW filter for mobile phone using surface mount plastic package. In IEEE ultrasonics symposium (pp. 113–118), October 2002.Google Scholar
  2. 2.
    Amer, A., Hegazi, E., & Ragaie, H. F. (2007). A 90-nm wideband merged CMOS LNA and mixer exploiting noise cancellation. IEEE Journal of Solid State Circuits, 42(2), 323–328.CrossRefGoogle Scholar
  3. 3.
    Zhan, H., Fan, X., & Sinencio, E. S. (2009). A low-power, linearized, ultrawideband LNA design technique. IEEE Journal of Solid State Circuits, 44(2), 320–330.CrossRefGoogle Scholar
  4. 4.
    Svensson, C. (2009). The blocker challenge when implementing software defined radio receiver RF frontends. Analog Integrated Circuits and Signal Processing. doi: 10.1007/s10470-009-9446-z.
  5. 5.
    Malla, P., Lakdawala, H., Kornegay, K., & Krishnamurthy, S. (2008). A 28 mW spectrum-sensing reconfigurable 20 MHz 72/70 dB SNR/SNDR DT ΔΣ ADC for 802.11n/WiMax receivers. In International Solid-State Circuits Conference (ISSCC) (pp. 496–497), February 2008.Google Scholar
  6. 6.
    Blad, A., Svensson, C., Johansson, H., & Andersson, S. (2006). An RF sampling radio frontend based on ΣΔ-conversion. In NORCHIP 2006 (pp. 133–136), November 2006.Google Scholar
  7. 7.
    Ahsan, N., Svensson, C., & Dabrowski, J. (2008). Highly linear wideband low power current mode LNA. In International Conference on Signals and Electronic Systems ICSES’08, September 14–17, 2008, Kraków, Poland.Google Scholar
  8. 8.
    Zhuo, W., Li, X., Shekar, S., Embabi, S. H. K., Pineda, J., Allstot, D. J., et al. (2005). A capacitor cross-coupled common-gate low-noise amplifier. IEEE Transactions on Circuits and Systems-II: Express Briefs, 52(12), 875–879.CrossRefGoogle Scholar
  9. 9.
    Gatta, F., Sacchi, E., Svelto, F., Vilmercati, P., & Castello, R. (2001). A 2-dB noise figure 900-MHz differential CMOS LNA. IEEE Journal of Solid State Circuits, 36(10), 1444–1452.CrossRefGoogle Scholar
  10. 10.
    Wang, S. B. T., Niknejad, A. M., & Brodersen, R. W. (2005). A sub-mW 960-MHz ultra-wideband CMOS LNA. In IEEE Radio Frequency Integrated Circuits (RFIC) symposium (pp. 35–38), June 2005.Google Scholar
  11. 11.
    Im, D., Nam, I., Kim, H. T., & Lee, K. (2009). A wideband CMOS low noise amplifier employing noise and IM2 distortion Cancellation for a digital TV tuner. IEEE Journal of Solid State Circuits, 44(3), 686–698.CrossRefGoogle Scholar
  12. 12.
    Nam, I., Kim, B., & Lee, K. (2005). CMOS RF amplifier and mixer circuits utilizing complementary characteristics of parallel combined NMOS and PMOS devices. IEEE Transactions on Microwave Theory and Techniques, 53(5), 1662–1671.CrossRefGoogle Scholar
  13. 13.
    Chen, W. H., Liu, G., Zdravko, B., & Niknejad, A. M. (2008). A highly linear broadband CMOS LNA employing noise and distortion cancellation. IEEE Journal of Solid-State Circuits, 43(5), 1164–1176.CrossRefGoogle Scholar
  14. 14.
    Youn, Y.-S., Chang, J.-H., Koh, K.-J., Lee, Y.-H., & Yu, H.-K. (2003). A 2 GHz 16 dBm IIP3 low noise amplifier in 0.25 μm CMOS technology. In International Solid-State Circuits Conference (ISSCC) (pp. 452–453).Google Scholar
  15. 15.
    Bagheri, R., Mirzaei, A., Chehrazi, S., et al. (2006). An 800 MHz-6 GHz software-defined wireless receiver in 90-nm CMOS. IEEE Journal of Solid State Circuits, 41(12), 2860–2876.CrossRefGoogle Scholar
  16. 16.
    Chehrazi, S., Bagheri, R., & Abidi, A. (2004) Noise in passive FET mixers: A simple physical model. In Proc. IEEE Custom Integrated Circuits Conf. (CICC’04) (pp. 375–378), September 2004.Google Scholar
  17. 17.
    Carlton, B. R., Duster, J. S., Taylor, S. S., & Conan Zhan, J. H. (2008). A 2.2 dB NF, 4.9–6 GHz direct conversion multi-standard RF receiver front-end in 90 nm CMOS. In IEEE Radio Frequency Integrated Circuits (RFIC) symposium (pp. 617–620), June 2008.Google Scholar
  18. 18.
    Blaakmeer, S., Klumperink, E., Leenerts, D., & Nauta, B. (2008). A wideband balun LNA I/Q-Mixer combination in 65 nm CMOS. In International Solid-State Circuits Conference (ISSCC) (pp. 326–328), February 2008.Google Scholar
  19. 19.
    Lee, S., Bergervoet, J., Harish, S., & Leenaerts, D. (2007). A broadband receive chain in 65 nm CMOS. In IEEE ISSCC 2007 (pp. 418–419).Google Scholar
  20. 20.
    Darabi, H. (2007). A blocker filtering technique for SAW-less wireless receivers. IEEE Journal of Solid-State Circuits, 42(12), 2766–2773.CrossRefGoogle Scholar
  21. 21.
    Kim, H., Lee, J., Copani, T., et al. (2009). Adaptive blocker rejection continuous-time ΣΔ ADC for MOBILE WiMAX applications. IEEE Journal of Solid-State Circuits, 44(10), 2766–2779.CrossRefGoogle Scholar
  22. 22.
    Borremans, J., Mandal, G., Debaillie, B., et al. (2010). A sub-3 dB NF voltage-sampling front-end with +18 dBm IIP3 and +2 dBm blocker compression point. In IEEE ESSCIRC 2010 (pp. 402–405), September 2010.Google Scholar

Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  • Naveed Ahsan
    • 1
  • Christer Svensson
    • 1
  • Rashad Ramzan
    • 1
  • Jerzy Dabrowski
    • 1
  • Aziz Ouacha
    • 1
  • Carl Samuelsson
    • 2
  1. 1.Linkoping UniversityLinkopingSweden
  2. 2.Swedish Defence Research AgencyLinkopingSweden

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