CMOS-based near zero-offset multiple inputs max–min circuits and its applications

  • Pipat Prommee
  • Krit Angkeaw
  • Montri Somdunyakanok
  • Kobchai Dejhan


CMOS-based near zero-offset multiple inputs maximum circuit and minimum circuits are proposed. The analog signal building blocks including shunt-feedback buffer, voltage-subtraction circuits and current mirrors are deployed for obtained the good performances. This achieved circuit is a simply scheme and able to work with low-power supplies. The input range is obtained around ±600 mV within ±1.5 V power supplies. Near zero-offset and low-output impedance are provided by proposed circuit. The delay of output is less than 5 ns for THD less than 1% and frequency response up to 500 MHz. Half-wave, full-wave rectifiers and 4 bits linear combination Digital-to-Analog Converter (DAC) are raised up to confirm the realistic applications. All performances including the DC-characteristic, frequency response, high-frequency wave output are simulated by PSpice.


Maximum circuit Minimum circuit Rectifier DAC 


  1. 1.
    Liu, S. I., Hwang, Y. S., & Tsay, J. H. (1993). CCII-based fuzzy membership function and max/min circuit. Electronics Letters, 29(1), 116–118. doi:10.1049/el:19930076.CrossRefGoogle Scholar
  2. 2.
    Inoue, T., Motomura, T., Matsuo, R., & Ueno, F. (1991). New OTA-based analog circuits for fuzzy membership functions and max/min operations. IEICE Transactions E , 74(11), 3619–3621.Google Scholar
  3. 3.
    Inoue, T., Ueno, F., Motomura, T., Setoguchi, O., & Matsuo, R. (1991). New high-speed analogue max and min circuits using OTA-based bounded difference operations. Electronics Letters, 27(12), 1034–1035. doi:10.1049/el:19910643.CrossRefGoogle Scholar
  4. 4.
    Opris, I. E. (1998). Rail-to-Rail Multiple-input min/max circuit. IEEE Transactions on Circuits and Systems II, 45, 137–140. doi:10.1109/82.659465.CrossRefGoogle Scholar
  5. 5.
    Carvajal, R. G., Martinez-Heredia, J., & Ramirez-Angulo, J. (2000). High-speed high-precision min/max circuits in CMOS technology. Electronics Letters, 36(8), 697–699. doi:10.1049/el:20000542.CrossRefGoogle Scholar
  6. 6.
    Wang, Z. (1990). 2-MOSFET transistors with extremely low distortion for output reaching supply voltage. Electronics Letters, 26, 951–952. doi:10.1049/el:19900620.CrossRefGoogle Scholar
  7. 7.
    Viswanathan, T. R. (1986). CMOS transconductance element. Proceedings of the IEEE, 74, 222–224. doi:10.1109/PROC.1986.13439.CrossRefGoogle Scholar
  8. 8.
    Karadimas, D. S., Mavridis, D. N., & Efstathiou, K. A. (2006, May). A digitally calibrated R-2R ladder architecture for high performance Digital-to-Analog Converters. Proceedings of ISCAS2006 (pp. 4779–4782).Google Scholar
  9. 9.
    Kennedy, M. P. (2000). On the robustness of R-2R ladder DAC’s. IEEE Transactions on Circuits and Systems II, 47, 109–116. doi:10.1109/81.828565.CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media, LLC 2009

Authors and Affiliations

  • Pipat Prommee
    • 1
  • Krit Angkeaw
    • 1
  • Montri Somdunyakanok
    • 2
  • Kobchai Dejhan
    • 1
  1. 1.Department of Telecommunications Engineering, Faculty of EngineeringKing’s Mongkut Institute of Technology LadkrabangBangkokThailand
  2. 2.Electrical Engineering Department, Faculty of EngineeringSiam UniversityBangkokThailand

Personalised recommendations