On-chip measurement of waveforms in mixed-signal circuits using a segmented subsampling technique
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Abstract
This paper presents a circuit technique for the design of a wideband on-chip sampling oscilloscope in mixed-signal integrated circuits. A coupled Phase Locked Loop (PLL) and Delay Locked Loop (DLL) module is designed to generate a high-resolution sampling clock over a limited time interval. This module has been employed as an enabling circuit to support on-chip measurement of fast waveforms through a subsampling technique attaining less than 10 ps sampling resolution. Input waveforms are first divided into equal-size-segments in the time domain and then each segment is subsampled with the sampling clock supplied by the coupled PLL and DLL module. The proposed measurement scheme has been fabricated in CMOS 0.18 μm technology and the measurement results indicate that over 7 effective bits of measurement linearity can be achieved for input signals up to 1.6 GHz.
Keywords
Sampling oscilloscope Analog waveform measurement Mixed-signal test Phase locked loopNotes
Acknowledgment
The authors would like to acknowledge the research funding given by Natural Sciences and Engineering Research Council of Canada (NSERC), MICRONET and Canadian Microelectronics Corporation (CMC) and Gennum Corporation to support this research.
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