A loop acceleration technique to speed up verification of automatically generated plans

  • Robert P. Goldman
  • Michael J. S. Pelican
  • David J. Musliner
VVPS-11
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Abstract

The CIRCA planning system automatically creates reactive plans and uses formal verification techniques to prove that those plans will preserve system safety. CIRCA’s timed automata verification system is highly efficient, yet can display pathologically bad behavior when reasoning about reaction loops, a particular form of interacting cycles of states. In this paper, we describe a loop acceleration technique that recognizes these state-space structures during the verification process and bypasses the process of expanding an arbitrarily large cycle of states, effectively compressing loops of arbitrary size into a compact, finite set of states. The resulting performance improvement can be very dramatic: in domains where tight loops of short-duration transitions interact with long-duration transitions, our new loop acceleration methods can reduce verification time (and hence planning time) from hours to below a second.

Keywords

Automated planning Verification Model checking Timed automata Loop acceleration 
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Notes

Acknowledgments

This article was supported by Office of Naval Research contract N0014-10-1-0188 via Carnegie Mellon University subaward number 1140185-240250 and Air Force Office of Scientific Research contract FA9550-12-1-0146 via Carnegie Mellon University subaward number 1150105-284227. This paper does not represent the official position or opinions of the Office of Naval Research, the Air Force Office of Scientific Research, or Carnegie Mellon University. Thanks to Ed Koeller for collecting supporting images and data. Thanks to our reviewers for many helpful questions, suggestions, and corrections.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2013

Authors and Affiliations

  • Robert P. Goldman
    • 1
  • Michael J. S. Pelican
    • 1
  • David J. Musliner
    • 1
  1. 1.SIFT, LLCMinneapolisUSA

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