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Personal and Ubiquitous Computing

, Volume 7, Issue 5, pp 299–308 | Cite as

The case for reconfigurable hardware in wearable computing

  • Christian PlesslEmail author
  • Rolf Enzler
  • Herbert Walder
  • Jan Beutel
  • Marco Platzner
  • Lothar Thiele
  • Gerhard Tröster
Original Article

Abstract

Wearable computers are embedded into the mobile environment of their users. A design challenge for wearable systems is to combine the high performance required for tasks such as video decoding with the low energy consumption required to maximise battery runtimes and the flexibility demanded by the dynamics of the environment and the applications. In this paper, we demonstrate that reconfigurable hardware technology is able to answer this challenge. We present the concept and the prototype implementation of an autonomous wearable unit with reconfigurable modules (WURM). We discuss experiments that show the uses of reconfigurable hardware in WURM: ASICs-on-demand and adaptive interfaces. Finally, we present an experiment with an operating system layer for WURM.

Keywords

Body area computing system Embedded systems Field-programmable gate arrays Reconfigurable hardware Wearable computing 

Notes

Acknowledgements

This work is being carried out in cooperation with the Wearable Computing Laboratory at ETH Zurich and is supported by ETH Zurich (Wearable Computing) and the Swiss National Science Foundation (NCCR MICS).

References

  1. 1.
    van Laerhoven K, Schmidt A and Gellersen HW (2002) Multi-sensor context aware clothing. In: Proceedings of the 6th International Symposium on Wearable Computers (ISWC), Seattle, WA, 7–10 October 2000Google Scholar
  2. 2.
    Kern N, Schiele B, Junker H, Lukowicz P and Tröster G (2002) Wearable sensing to annotate meeting records. In: Proceedings of the 6th International Symposium on Wearable Computers (ISWC), Seattle, WA, 7–10 October 2000Google Scholar
  3. 3.
    Kymissis J, Kendall C, Paradiso J and Gershenfeld N (1998) Parasitic power harvesting in shoes. In: Proceedings of the 2nd International Symposium on Wearable Computers (ISWC), Pittsburgh, PA, 19–20 October 1998Google Scholar
  4. 4.
    Kirstein T, Cottet C, Grzyb J and Tröster G (2002) Textiles for signal transmission in wearables. In: Proceedings of the Workshop on Modeling, Analysis and Middleware Support for Electronic Textiles (MAMSET), San Jose, CA, 6 October 2002Google Scholar
  5. 5.
    Park S, Mackenzie K and Jayaraman S (2002) The wearable motherboard: a framework for personalized mobile information processing (PMIP). In: Proceedings of the 39th Design Automation Confererence (DAC), New Orleans, LA, 10–14 June 2002Google Scholar
  6. 6.
    Herring C (2000) Microprocessors, microcontrollers, and systems in the new millennium. IEEE Micro 20(6):45–51Google Scholar
  7. 7.
    Brown S, Rose J (1996) FPGA and CPLD architectures: a tutorial. IEEE Des Test Comp 13(2):42–57Google Scholar
  8. 8.
    Triscend Corp. (2001) Triscend E5 configurable system-on-chip platformGoogle Scholar
  9. 9.
    Xilinx, Inc. (2002) Virtex-II Pro platform FPGA handbookGoogle Scholar
  10. 10.
    Mencer O, Morf M and Flynn MJ (1998) Hardware software tri-design of encryption for mobile communication units. In: Proceedings of the International Conference on Acoustics, Speech, and Signal Processing (ICASSP), Seattle, WA, 12–15 May 1998Google Scholar
  11. 11.
    Abnous A, Seno K, Ichikawa Y, Wan M and Rabaey J (1998) Evaluation of a low-power reconfigurable DSP architecture. In: Proceedings of the 5th Reconfigurable Architectures Workshop (RAW), Springer Lecture Notes in Computer Science 1388:55–60Google Scholar
  12. 12.
    Stitt G, Grattan B, Villarreal J and Vahid F (2002) Using on-chip configurable logic to reduce embedded system software energy. In: Proceedings of the 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), Napa, CA, 22–24 April 2002Google Scholar
  13. 13.
    Rabaey JM, Ammer MJ, da Silva Jr. JL, Patel D, and Roundy S (2000) PicoRadio supports ad hoc ultra-low power wireless networking. IEEE Comp 33(7):42–48Google Scholar
  14. 14.
    Liu Z, Wang Y and Chen T (1998) Audio feature extraction and analysis for scene segmentation and classification. J VLSI Sig Process 20(1/2):61–79Google Scholar
  15. 15.
    van Laerhoven K, Aidoo KA and Lowette S (2001) Real-time analysis of data from many sensors with neural networks. In: Proceedings of the 5th International Symposium on Wearable Computers (ISWC), Zurich, Switzerland, 8–9 October 2001Google Scholar
  16. 16.
    Scalera S, Falco M and Nelson B (2000) A reconfigurable computing architecture for microsensors. In Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), Napa, CA, 17–19 April 2000Google Scholar
  17. 17.
    Mignolet JY, Vernalde S, Verkest D and Lauwereins R (2002) Enabling hardware-software multitasking on a reconfigurable computing platform for networked portable multimedia appliances. In: Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), Las Vegas, NV, 24–27 June 2002Google Scholar
  18. 18.
    Yau SS, Karim F (2001) Reconfigurable context-sensitive middleware for ADS applications in mobile ad hoc network environments. In: Proceedings of the 5th International Symposium on Autonomous Decentralized Systems (ISADS), Dallas, TX, 26–28 March 2001Google Scholar
  19. 19.
    Xilinx, Inc. (2002) PicoBlaze 8-bit microcontroller for Virtex devices. Application Note XAPP213Google Scholar
  20. 20.
    Xilinx, Inc. (2002) MicroBlaze hardware reference guideGoogle Scholar
  21. 21.
    Beutel J, Kasten O, Ringwald M, Siegemund F and Thiele L (2003) Bluetooth smart nodes for ad-hoc networks. TIK Technical Report No. 167, Computer Engineering and Networks Lab, Swiss Federal Institute of Technology (ETH) ZurichGoogle Scholar
  22. 22.
    Enzler R, Platzner M, Plessl C, Thiele L and Tröster G (2001) Reconfigurable processors for handhelds and wearables: application analysis. In: Proceedings of SPIE 4525:135–146Google Scholar
  23. 23.
    Dyer M, Plessl C and Platzner M (2002) Partially reconfigurable cores for Xilinx Virtex. In: Field-programmable logic and applications, Springer Lecture Notes in Computer Science 2438:292–301Google Scholar
  24. 24.
    Gaisler J (2001) The LEON processor user's manual, Version 2.3.7, Gaisler ResearchGoogle Scholar
  25. 25.
    Lerjen M, Zbinden C (2002) Reconfigurable Bluetooth–Ethernet bridge. Master's thesis, Swiss Federal Institute of Technology (ETH)Google Scholar
  26. 26.
    Dyer M, Wirz M (2002) Reconfiguranle system on FPGA. Master's thesis, Swiss Federal Institute of TechnologyGoogle Scholar

Copyright information

© Springer-Verlag London Limited 2003

Authors and Affiliations

  • Christian Plessl
    • 1
    Email author
  • Rolf Enzler
    • 2
  • Herbert Walder
    • 1
  • Jan Beutel
    • 1
  • Marco Platzner
    • 1
  • Lothar Thiele
    • 1
  • Gerhard Tröster
    • 2
  1. 1.ETH Zentrum Office ETZ-G81Computer Engineering and Networks Lab (TIK)ZurichSwitzerland
  2. 2.Electronics LaboratorySwiss Federal Institute of Technology (ETH) ZurichSwitzerland

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