, Volume 97, Issue 9, pp 939–959 | Cite as

Identifying the optimal level of parallelism in transactional memory applications

  • Diego Didona
  • Pascal Felber
  • Derin Harmanci
  • Paolo Romano
  • Jörg Schenker


In this paper we investigate the issue of automatically identifying the “natural” degree of parallelism of an application using software transactional memory (STM), i.e., the workload-specific multiprogramming level that maximizes application’s performance. We discuss the importance of adapting the concurrency level in two different scenarios, a shared-memory and a distributed STM infrastructure. We propose and evaluate two alternative self-tuning methodologies, explicitly tailored for the considered scenarios. In shared-memory STM, we show that lightweight, black-box approaches relying solely on on-line exploration can be extremely effective. For distributed STMs , we introduce a novel hybrid approach that combines model-driven performance forecasting techniques and on-line exploration in order to take the best of the two techniques, namely enhancing robustness despite model’s inaccuracies, and maximizing convergence speed towards optimum solutions.


Transactional memory Self-tuning Multi-programming level Analytical modelling Machine learning Gradient descent 

Mathematics Subject Classification




This work has been partially supported by the projects “Cloud-TM” and “ParaDIME” (co-financed by the European Commission through the contracts no. 257784 and 318693), project specSTM (PTDC/EIA-EIA/122785/2010), the COST Action Euro-TM (IC1001) and by FCT (INESC-ID multiannual funding) through the PEst-OE/EEI/LA0021/2013 Program Funds.


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Copyright information

© Springer-Verlag Wien 2013

Authors and Affiliations

  • Diego Didona
    • 1
  • Pascal Felber
    • 2
  • Derin Harmanci
    • 2
  • Paolo Romano
    • 1
  • Jörg Schenker
    • 2
  1. 1.Instituto Superior Técnico/INESC-IDLisbonPortugal
  2. 2.University of NeuchâtelNeuchâtelSwitzerland

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