Power-aware VLSI design of reversible watermarking for access control
A lifting based reversible data hiding is introduced here. The low–high subband is subdivided into little blocks of size (4 × 4), to generate a content dependent watermark. Then the access management is done by permutation of the content dependent watermark by a user-specific covert key. The permuted watermark is employed to modulate the lifting coefficients of the low–high subband. The modulation causes degradation of the visual quality of the host image. That plays an important role in access management through inverse method. Lastly, a low-power ‘very-large-scale-integration’ architectural hardware of this scheme is designed and synthesized on a ‘field programmable gate array’. The experiment is conducted over a variety of benchmark images and the results establish the superiority of the method. It is also observed that in real-time processing, the scheme consumes 63.26% less power than the related implementation found in the literature, for watermarking encoder and decoder at a maximum operating frequency of 130.186 MHz for the processing of (512 × 512) sized images.
This study was supported by the Ministry of Science and Technology (MOST), Taiwan ROC, under Grant Numbers MOST 107-3113-E-155-001-CC2, 106-3113-E-155-001-CC2, 106-2221-E-155-036, 105-3113-E-155-001, 104-3113-E-155-001, 103-3113-E-155-001, 103-2221-E-155-028-MY3.
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