Microsystem Technologies

, Volume 14, Issue 4–5, pp 665–671 | Cite as

Three-dimensional simulation of sacrificial etching

  • Johann Cervenka
  • Hajdin Ceric
  • Siegfried Selberherr
Technical Paper


Sacrificial etching is one of the most important process steps in micro-electro-mechanical systems technology, since it enables the generation of free-standing structures. These structures are often the main part of micro-mechanical devices, intended to sense or induce a mechanical movement. The etching process transforms an initial multi-segmented geometry and depends on material properties and several process conditions. One of the crucial issues for etching is the etching selectivity on different materials. The major task for the simulation is to give an answer, how sacrificial layer surfaces regress in time under the influence of process parameters and to which magnitude surrounding material segments are affected by the etching process. For this purpose we have developed a fully three-dimensional topography simulation tool, Etcher-Topo3D, which is capable to deal with realistic process conditions. The main concept is demonstrated in this work. During simulation the topography of the initial multi-segment geometry is changed which is handled by a level-set algorithm. After a simulation is finished, the level-set representation has usually to be converted back to a mesh representation to enable further analysis. To illustrate the main features of our simulation tool several examples of MEMS structures with a sacrificial layer are presented.


Etch Rate Sacrificial Layer Volume Mesh Polysilicon Layer Isolation Layer 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.



This work has been supported by the European Community PROMENADE project.


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Copyright information

© Springer-Verlag 2007

Authors and Affiliations

  • Johann Cervenka
    • 1
  • Hajdin Ceric
    • 1
  • Siegfried Selberherr
    • 1
  1. 1.Institute for MicroelectronicsTechnische Universität WienViennaAustria

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