The influence of two modern compiler infrastructures on the energy consumption of the HPCG benchmark

  • Armin JägerEmail author
  • Jan-Patrick Lehr
  • Christian Bischof
Special Issue Paper


As energy consumption plays a more and more critical role in high-performance computing installations, investigating the influence of the different system components and their share w.r.t. energy consumption is of great interest. The compiler is one of the key parts of the software environment. Unlike processor frequency and power limits, the influence of the compiler and its sets of optimizations on energy consumption has not received much attention in the field of high-performance computing yet. In this paper, we present a study which compares the GNU and Intel compiler infrastructures with each other concerning the energy consumption of the generated code. We use the HPCG benchmark as target application and perform energy measurements using both single-socket and whole-machine measurements. Our results show that the compiler can have a strong influence on energy consumption: For one configuration, the binary compiled with the Intel compiler consumes approximately twice the amount of energy of the binary compiled with the GNU compiler, even though the runtime is practically the same.


Compiler Optimization RAPL IPMI Energy consumption Energy aware scheduling 



Calculations for this research were conducted on the Lichtenberg high performance computer of the Technische Universität Darmstadt. The work of Jan-Patrick Lehr is supported by the ‘Excellence Initiative’ of the German Federal and State Governments and the Graduate School of Computational Engineering at Technische Universität Darmstadt.


  1. 1.
    Rountree B, Ahn DH, de Supinski BR, Lowenthal DK, Schulz M (2012) 2013 IEEE international symposium on parallel & distributed processing, workshops and Ph.D. Forum 00, 947.
  2. 2.
    Schuchart J, Hackenberg D, Schöne R, Ilsche T, Nagappan MK (2016) Ramkumarand Patterson, computer science research and development 31(4):197Google Scholar
  3. 3.
    Wang L, von Laszewski G, Dayal J, Wang F (2010) In: 2010 10th IEEE/ACM international conference on cluster, cloud and grid computing, pp 368–377.
  4. 4.
    Intel 64 and IA-32 Architectures Software Developer’s Manual, Volume 3B: system programming guide, Part 2 (2016)Google Scholar
  5. 5.
    Dongarra J, Luszczek, P (2013) Sandia National Laboratories, Sandia Report SAND2013-8752Google Scholar
  6. 6.
    Dongarra J, Heroux MA, Luszczek P (2016) IJHPCA 30(1):3.
  7. 7.
    Seng JS, Tullsen DM (2003) In: Interaction between compilers and computer architectures, 2003. INTERACT-7 2003. Proceedings. Seventh Workshop on (IEEE, 2003), pp 51–56Google Scholar
  8. 8.
    McCalpin JD (1995) IEEE TCCA Newsletter 19:25Google Scholar
  9. 9.
    Treibig J, Hager G, Wellein G (2010) In: Proceedings of the 2010 39th international conference on parallel processing workshops (IEEE Computer Society, Washington, DC, USA, 2010), ICPPW ’10, pp 207–216.
  10. 10.
    Esmer I, Kottapalli S (2014) In: 2014 IEEE hot chips 26 symposium (HCS) (2014), pp 1–29.

Copyright information

© Springer-Verlag GmbH Germany, part of Springer Nature 2018

Authors and Affiliations

  • Armin Jäger
    • 1
    Email author
  • Jan-Patrick Lehr
    • 2
  • Christian Bischof
    • 1
  1. 1.Hochschulrechenzentrum Technische Universität DarmstadtDarmstadtGermany
  2. 2.Graduate School of Computational EngineeringTechnische Universität DarmstadtDarmstadtGermany

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